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author | Nadav Rotem <nadav.rotem@intel.com> | 2011-12-25 20:01:38 +0000 |
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committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-12-25 20:01:38 +0000 |
commit | c1faeac410b3891483ec0aabeec5b047472a4409 (patch) | |
tree | 269bcec5f4bec333f727bf2bd20304411bc113b2 /llvm/lib/CodeGen | |
parent | 771c4a1775a66eee428398ce6fc3a911f962b088 (diff) | |
download | bcm5719-llvm-c1faeac410b3891483ec0aabeec5b047472a4409.tar.gz bcm5719-llvm-c1faeac410b3891483ec0aabeec5b047472a4409.zip |
Fix a typo in the widening of vectors in PromoteIntRes. Patch by Shemer Anat.
llvm-svn: 147272
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index 1c02c4f21c8..26be0b74c8e 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -252,9 +252,9 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) { return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); } case TargetLowering::TypeWidenVector: - if (OutVT.bitsEq(NInVT)) + if (NOutVT.bitsEq(NInVT)) // The input is widened to the same size. Convert to the widened value. - return DAG.getNode(ISD::BITCAST, dl, OutVT, GetWidenedVector(InOp)); + return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp)); } return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, |