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authorOwen Anderson <resistor@mac.com>2012-07-11 06:38:55 +0000
committerOwen Anderson <resistor@mac.com>2012-07-11 06:38:55 +0000
commitb8844d674443a26a4563158215493e2d8957bd5d (patch)
tree91e385039cb025b0d3c6b07ec2371170ee303fb3 /llvm/lib/CodeGen
parent5f0a1b89d7f43ae8307f4fffbfbe1e9cc8e00c81 (diff)
downloadbcm5719-llvm-b8844d674443a26a4563158215493e2d8957bd5d.tar.gz
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Only apply the SETCC+SITOFP -> SELECTCC optimization when the SETCC returns an MVT::i1, i.e. before type legalization.
This is a speculative fix for a problem on Mips reported by Akira Hatanaka. llvm-svn: 160036
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 153f643f730..e2c7dec40c7 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5975,7 +5975,8 @@ SDValue DAGCombiner::visitSINT_TO_FP(SDNode *N) {
}
// fold (sint_to_fp (setcc x, y, cc)) -> (select_cc x, y, -1.0, 0.0,, cc)
- if (N0.getOpcode() == ISD::SETCC && !VT.isVector() &&
+ if (N0.getOpcode() == ISD::SETCC && N0.getValueType() == MVT::i1 &&
+ !VT.isVector() &&
(!LegalOperations ||
TLI.isOperationLegalOrCustom(llvm::ISD::ConstantFP, VT))) {
SDValue Ops[] =
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