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| author | Chris Lattner <sabre@nondot.org> | 2006-03-25 23:00:56 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-03-25 23:00:56 +0000 |
| commit | b6e2d0027adb2e6f220365ad2ddf4c8da0d5c55a (patch) | |
| tree | 7610caf5ddf346a11ba877d9237b6f3d1b012b18 /llvm/lib/CodeGen | |
| parent | 3de9286e094a0b93837be62a4bbd54de93427ebe (diff) | |
| download | bcm5719-llvm-b6e2d0027adb2e6f220365ad2ddf4c8da0d5c55a.tar.gz bcm5719-llvm-b6e2d0027adb2e6f220365ad2ddf4c8da0d5c55a.zip | |
Add some comments.
llvm-svn: 27133
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocLinearScan.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/RegAllocLinearScan.cpp b/llvm/lib/CodeGen/RegAllocLinearScan.cpp index 252fcfc2e83..59467c1e0f8 100644 --- a/llvm/lib/CodeGen/RegAllocLinearScan.cpp +++ b/llvm/lib/CodeGen/RegAllocLinearScan.cpp @@ -539,6 +539,7 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur) DEBUG(std::cerr << "\tassigning stack slot at interval "<< *cur << ":\n"); + // Find a register to spill. float minWeight = float(HUGE_VAL); unsigned minReg = 0; for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_), @@ -549,6 +550,9 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur) minReg = reg; } } + + // If we didn't find a register that is spillable, try aliases? + // FIXME: assert(minReg && "Didn't find any reg!"); DEBUG(std::cerr << "\t\tregister with min weight: " << mri_->getName(minReg) << " (" << minWeight << ")\n"); |
