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authorRafael Espindola <rafael.espindola@gmail.com>2014-03-07 06:08:31 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2014-03-07 06:08:31 +0000
commitb1f25f1b93fd9cf3dbe4168a73d9485780b1fb47 (patch)
tree4cfa442051bc59428d1377a6ae1bde5f3db72041 /llvm/lib/CodeGen
parentc994c6a35bed00a5a98ff9b6fd55dc60cc3c062d (diff)
downloadbcm5719-llvm-b1f25f1b93fd9cf3dbe4168a73d9485780b1fb47.tar.gz
bcm5719-llvm-b1f25f1b93fd9cf3dbe4168a73d9485780b1fb47.zip
Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
The old system was fairly convoluted: * A temporary label was created. * A single PROLOG_LABEL was created with it. * A few MCCFIInstructions were created with the same label. The semantics were that the cfi instructions were mapped to the PROLOG_LABEL via the temporary label. The output position was that of the PROLOG_LABEL. The temporary label itself was used only for doing the mapping. The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to one by holding an index into the CFI instructions of this function. I did consider removing MMI.getFrameInstructions completelly and having CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non trivial constructors and destructors and are somewhat big, so the this setup is probably better. The net result is that we don't create temporary labels that are never used. llvm-svn: 203204
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp25
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp2
-rw-r--r--llvm/lib/CodeGen/MachineBasicBlock.cpp2
-rw-r--r--llvm/lib/CodeGen/MachineCSE.cpp4
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp11
-rw-r--r--llvm/lib/CodeGen/PeepholeOptimizer.cpp2
-rw-r--r--llvm/lib/CodeGen/ScheduleDAGInstrs.cpp5
-rw-r--r--llvm/lib/CodeGen/TargetInstrInfo.cpp2
8 files changed, 26 insertions, 27 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 7e0b2f4af2e..50161c5af97 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -699,9 +699,7 @@ bool AsmPrinter::needsSEHMoves() {
MF->getFunction()->needsUnwindTableEntry();
}
-void AsmPrinter::emitPrologLabel(const MachineInstr &MI) {
- const MCSymbol *Label = MI.getOperand(0).getMCSymbol();
-
+void AsmPrinter::emitCFIInstruction(const MachineInstr &MI) {
ExceptionHandling::ExceptionsType ExceptionHandlingType =
MAI->getExceptionHandlingType();
if (ExceptionHandlingType != ExceptionHandling::DwarfCFI &&
@@ -716,16 +714,9 @@ void AsmPrinter::emitPrologLabel(const MachineInstr &MI) {
const MachineModuleInfo &MMI = MF->getMMI();
const std::vector<MCCFIInstruction> &Instrs = MMI.getFrameInstructions();
- bool FoundOne = false;
- (void)FoundOne;
- for (std::vector<MCCFIInstruction>::const_iterator I = Instrs.begin(),
- E = Instrs.end(); I != E; ++I) {
- if (I->getLabel() == Label) {
- emitCFIInstruction(*I);
- FoundOne = true;
- }
- }
- assert(FoundOne);
+ unsigned CFIIndex = MI.getOperand(0).getCFIIndex();
+ const MCCFIInstruction &CFI = Instrs[CFIIndex];
+ emitCFIInstruction(CFI);
}
/// EmitFunctionBody - This method emits the body and trailer for a
@@ -748,7 +739,7 @@ void AsmPrinter::EmitFunctionBody() {
LastMI = II;
// Print the assembly for the instruction.
- if (!II->isLabel() && !II->isImplicitDef() && !II->isKill() &&
+ if (!II->isPosition() && !II->isImplicitDef() && !II->isKill() &&
!II->isDebugValue()) {
HasAnyRealCode = true;
++EmittedInsts;
@@ -767,8 +758,8 @@ void AsmPrinter::EmitFunctionBody() {
emitComments(*II, OutStreamer.GetCommentOS());
switch (II->getOpcode()) {
- case TargetOpcode::PROLOG_LABEL:
- emitPrologLabel(*II);
+ case TargetOpcode::CFI_INSTRUCTION:
+ emitCFIInstruction(*II);
break;
case TargetOpcode::EH_LABEL:
@@ -811,7 +802,7 @@ void AsmPrinter::EmitFunctionBody() {
// label equaling the end of function label and an invalid "row" in the
// FDE. We need to emit a noop in this situation so that the FDE's rows are
// valid.
- bool RequiresNoop = LastMI && LastMI->isPrologLabel();
+ bool RequiresNoop = LastMI && LastMI->isCFIInstruction();
// If the function is empty and the object file uses .subsections_via_symbols,
// then we need to emit *something* to the function body to prevent the
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index 800be0db08c..84c486cf89a 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -1610,7 +1610,7 @@ void DwarfDebug::beginFunction(const MachineFunction *MF) {
History.push_back(MI);
} else {
// Not a DBG_VALUE instruction.
- if (!MI->isLabel())
+ if (!MI->isPosition())
AtBlockEntry = false;
// First known non-DBG_VALUE and non-frame setup location marks
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 077e74db736..888c20e3a7c 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -160,7 +160,7 @@ MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() {
MachineBasicBlock::iterator
MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) {
iterator E = end();
- while (I != E && (I->isPHI() || I->isLabel() || I->isDebugValue()))
+ while (I != E && (I->isPHI() || I->isPosition() || I->isDebugValue()))
++I;
// FIXME: This needs to change if we wish to bundle labels / dbg_values
// inside the bundle.
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp
index c6f0133da5f..afd4d7a2252 100644
--- a/llvm/lib/CodeGen/MachineCSE.cpp
+++ b/llvm/lib/CodeGen/MachineCSE.cpp
@@ -325,8 +325,8 @@ bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
}
bool MachineCSE::isCSECandidate(MachineInstr *MI) {
- if (MI->isLabel() || MI->isPHI() || MI->isImplicitDef() ||
- MI->isKill() || MI->isInlineAsm() || MI->isDebugValue())
+ if (MI->isPosition() || MI->isPHI() || MI->isImplicitDef() || MI->isKill() ||
+ MI->isInlineAsm() || MI->isDebugValue())
return false;
// Ignore copies.
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index b8f8e703c69..4f0213299aa 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -203,6 +203,8 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
return getRegMask() == Other.getRegMask();
case MachineOperand::MO_MCSymbol:
return getMCSymbol() == Other.getMCSymbol();
+ case MachineOperand::MO_CFIIndex:
+ return getCFIIndex() == Other.getCFIIndex();
case MachineOperand::MO_Metadata:
return getMetadata() == Other.getMetadata();
}
@@ -247,6 +249,8 @@ hash_code llvm::hash_value(const MachineOperand &MO) {
return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMetadata());
case MachineOperand::MO_MCSymbol:
return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMCSymbol());
+ case MachineOperand::MO_CFIIndex:
+ return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCFIIndex());
}
llvm_unreachable("Invalid machine operand type");
}
@@ -380,6 +384,9 @@ void MachineOperand::print(raw_ostream &OS, const TargetMachine *TM) const {
case MachineOperand::MO_MCSymbol:
OS << "<MCSym=" << *getMCSymbol() << '>';
break;
+ case MachineOperand::MO_CFIIndex:
+ OS << "<call frame instruction>";
+ break;
}
if (unsigned TF = getTargetFlags())
@@ -1295,8 +1302,8 @@ bool MachineInstr::isSafeToMove(const TargetInstrInfo *TII,
return false;
}
- if (isLabel() || isDebugValue() ||
- isTerminator() || hasUnmodeledSideEffects())
+ if (isPosition() || isDebugValue() || isTerminator() ||
+ hasUnmodeledSideEffects())
return false;
// See if this instruction does a load. If so, we have to guarantee that the
diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
index 28f2d2f9e96..45f836662ec 100644
--- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp
+++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
@@ -596,7 +596,7 @@ bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
// If there exists an instruction which belongs to the following
// categories, we will discard the load candidate.
- if (MI->isLabel() || MI->isPHI() || MI->isImplicitDef() ||
+ if (MI->isPosition() || MI->isPHI() || MI->isImplicitDef() ||
MI->isKill() || MI->isInlineAsm() || MI->isDebugValue() ||
MI->hasUnmodeledSideEffects()) {
FoldAsLoadDefReg = 0;
diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
index 2ba03933913..c8328ad4911 100644
--- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -804,8 +804,9 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
"RPTracker can't find MI");
}
- assert((CanHandleTerminators || (!MI->isTerminator() && !MI->isLabel())) &&
- "Cannot schedule terminators or labels!");
+ assert(
+ (CanHandleTerminators || (!MI->isTerminator() && !MI->isPosition())) &&
+ "Cannot schedule terminators or labels!");
// Add register-based dependencies (data, anti, and output).
bool HasVRegDef = false;
diff --git a/llvm/lib/CodeGen/TargetInstrInfo.cpp b/llvm/lib/CodeGen/TargetInstrInfo.cpp
index 29249cfc8f6..cae3ccd18ce 100644
--- a/llvm/lib/CodeGen/TargetInstrInfo.cpp
+++ b/llvm/lib/CodeGen/TargetInstrInfo.cpp
@@ -645,7 +645,7 @@ bool TargetInstrInfo::isSchedulingBoundary(const MachineInstr *MI,
const MachineBasicBlock *MBB,
const MachineFunction &MF) const {
// Terminators and labels can't be scheduled around.
- if (MI->isTerminator() || MI->isLabel())
+ if (MI->isTerminator() || MI->isPosition())
return true;
// Don't attempt to schedule around any instruction that defines
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