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author | Dan Gohman <gohman@apple.com> | 2011-11-08 21:29:06 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2011-11-08 21:29:06 +0000 |
commit | a4bc6171a5171195fef3e3c6da08b0705b4b0549 (patch) | |
tree | 0afc799e4a4bb45030536e140cc10efe21ed4d4d /llvm/lib/CodeGen | |
parent | c3770ac687006936e0a0980ea52a020a13a6bf1e (diff) | |
download | bcm5719-llvm-a4bc6171a5171195fef3e3c6da08b0705b4b0549.tar.gz bcm5719-llvm-a4bc6171a5171195fef3e3c6da08b0705b4b0549.zip |
Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.
llvm-svn: 144124
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index cab303dd5c3..f965a5e8ab5 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -1666,7 +1666,7 @@ public: protected: bool canClobber(const SUnit *SU, const SUnit *Op); - void AddPseudoTwoAddrDeps(); + void AddPseudoTwoAddrDeps(const TargetInstrInfo *TII); void PrescheduleNodesWithMultipleUses(); void CalculateSethiUllmanNumbers(); }; @@ -2628,7 +2628,7 @@ bool ilp_ls_rr_sort::operator()(SUnit *left, SUnit *right) const { void RegReductionPQBase::initNodes(std::vector<SUnit> &sunits) { SUnits = &sunits; // Add pseudo dependency edges for two-address nodes. - AddPseudoTwoAddrDeps(); + AddPseudoTwoAddrDeps(TII); // Reroute edges to nodes with multiple uses. if (!TracksRegPressure) PrescheduleNodesWithMultipleUses(); @@ -2855,7 +2855,17 @@ void RegReductionPQBase::PrescheduleNodesWithMultipleUses() { /// one that has a CopyToReg use (more likely to be a loop induction update). /// If both are two-address, but one is commutable while the other is not /// commutable, favor the one that's not commutable. -void RegReductionPQBase::AddPseudoTwoAddrDeps() { +void RegReductionPQBase::AddPseudoTwoAddrDeps(const TargetInstrInfo *TII) { + // If the graph contains any calls, disable this optimization. + // FIXME: This is a kludge to work around the fact that the artificial edges + // can combine with the way call sequences use physical register dependencies + // to model their resource usage to create unschedulable graphs. + for (unsigned i = 0, e = SUnits->size(); i != e; ++i) + for (SDNode *Node = (*SUnits)[i].getNode(); Node; Node = Node->getGluedNode()) + if (Node->isMachineOpcode() && + Node->getMachineOpcode() == (unsigned)TII->getCallFrameSetupOpcode()) + return; + for (unsigned i = 0, e = SUnits->size(); i != e; ++i) { SUnit *SU = &(*SUnits)[i]; if (!SU->isTwoAddress) |