[RegisterBankInfo] Avoid code duplication in OperandsMapper for the computation of the end of range.

Refactor the code so that we do not compute in two different places the
end iterator for the range of new virtual registers for a given operand.
Although this refactoring was intended as NFC, this is not the case
because it actually fixes a bug where we were returning a range off by 1
(too long). Right now, this could not result in an actual bug because we
were accessing this range via the BreakDown size of the related operand.

llvm-svn: 272208

1 files changed, 17 insertions, 6 deletions

diff --git a/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp b/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
index f945a087e60..6173369f9cc 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
@@ -538,13 +538,26 @@ RegisterBankInfo::OperandsMapper::getVRegsMem(unsigned OpIdx) {
       NewVRegs.push_back(0);
   }
   SmallVectorImpl<unsigned>::iterator End =
-      NewVRegs.size() <= StartIdx + NumPartialVal + 1
-          ? NewVRegs.end()
-          : &NewVRegs[StartIdx + NumPartialVal + 1];
+      getNewVRegsEnd(StartIdx, NumPartialVal);
 
   return make_range(&NewVRegs[StartIdx], End);
 }
 
+SmallVectorImpl<unsigned>::const_iterator
+RegisterBankInfo::OperandsMapper::getNewVRegsEnd(unsigned StartIdx,
+                                                 unsigned NumVal) const {
+  return const_cast<OperandsMapper *>(this)->getNewVRegsEnd(StartIdx, NumVal);
+}
+SmallVectorImpl<unsigned>::iterator
+RegisterBankInfo::OperandsMapper::getNewVRegsEnd(unsigned StartIdx,
+                                                 unsigned NumVal) {
+  assert((NewVRegs.size() == StartIdx + NumVal ||
+          NewVRegs.size() > StartIdx + NumVal) &&
+         "NewVRegs too small to contain all the partial mapping");
+  return NewVRegs.size() <= StartIdx + NumVal ? NewVRegs.end()
+                                              : &NewVRegs[StartIdx + NumVal];
+}
+
 void RegisterBankInfo::OperandsMapper::createVRegs(unsigned OpIdx) {
   assert(OpIdx < getMI().getNumOperands() && "Out-of-bound access");
   iterator_range<SmallVectorImpl<unsigned>::iterator> NewVRegsForOpIdx =
@@ -588,9 +601,7 @@ RegisterBankInfo::OperandsMapper::getVRegs(unsigned OpIdx,
   unsigned PartMapSize =
       getInstrMapping().getOperandMapping(OpIdx).BreakDown.size();
   SmallVectorImpl<unsigned>::const_iterator End =
-      NewVRegs.size() <= StartIdx + PartMapSize + 1
-          ? NewVRegs.end()
-          : &NewVRegs[StartIdx + PartMapSize + 1];
+      getNewVRegsEnd(StartIdx, PartMapSize);
   iterator_range<SmallVectorImpl<unsigned>::const_iterator> Res =
       make_range(&NewVRegs[StartIdx], End);
 #ifndef NDEBUG