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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-15 23:28:14 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-15 23:28:14 +0000
commit99f35eab45154a1193d4ad77be4ee182f7f34b8e (patch)
tree6b90ab2e54fef8169f7cef3beac685442df0bdea /llvm/lib/CodeGen
parentd70fb9812adbfa133be0c4348faa014c4f53f1c5 (diff)
downloadbcm5719-llvm-99f35eab45154a1193d4ad77be4ee182f7f34b8e.tar.gz
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Use set operations instead of plain lists to enumerate register classes.
This simplifies many of the target description files since it is common for register classes to be related or contain sequences of numbered registers. I have verified that this doesn't change the files generated by TableGen for ARM and X86. It alters the allocation order of MBlaze GPR and Mips FGR32 registers, but I believe the change is benign. llvm-svn: 133105
Diffstat (limited to 'llvm/lib/CodeGen')
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