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| author | Adrian Prantl <aprantl@apple.com> | 2017-09-08 02:31:37 +0000 |
|---|---|---|
| committer | Adrian Prantl <aprantl@apple.com> | 2017-09-08 02:31:37 +0000 |
| commit | 99ba97726ac68dd3ff134a63ca815462069aafe3 (patch) | |
| tree | b429baf024ea55ad424c0a1880f75ffb9fda4838 /llvm/lib/CodeGen | |
| parent | 711dec260fc5ad2ec48fe73351bbfb9bd6d843d8 (diff) | |
| download | bcm5719-llvm-99ba97726ac68dd3ff134a63ca815462069aafe3.tar.gz bcm5719-llvm-99ba97726ac68dd3ff134a63ca815462069aafe3.zip | |
Fix a crash when emitting debug info for multi-reg function arguments
by reusing more of the existing machinery
This is a follow-up to r312169.
Thanks to Björn Pettersson for the testcase!
llvm-svn: 312773
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 32 |
1 files changed, 18 insertions, 14 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index da0a9516fd1..fb32487ac42 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -4809,23 +4809,27 @@ bool SelectionDAGBuilder::EmitFuncArgumentDbgValue( // Check if ValueMap has reg number. DenseMap<const Value *, unsigned>::iterator VMI = FuncInfo.ValueMap.find(V); if (VMI != FuncInfo.ValueMap.end()) { - auto *Ty = V->getType(); const auto &TLI = DAG.getTargetLoweringInfo(); - EVT VT = TLI.getValueType(DAG.getDataLayout(), Ty); - unsigned NumRegs = TLI.getNumRegisters(Ty->getContext(), VT); + RegsForValue RFV(V->getContext(), TLI, DAG.getDataLayout(), VMI->second, + V->getType(), isABIRegCopy(V)); + unsigned NumRegs = + std::accumulate(RFV.RegCount.begin(), RFV.RegCount.end(), 0); if (NumRegs > 1) { - // The registers are guaranteed to be allocated in sequence. + unsigned I = 0; unsigned Offset = 0; - MVT RegisterVT = TLI.getRegisterType(Ty->getContext(), VT); - unsigned RegisterSize = RegisterVT.getSizeInBits(); - for (unsigned I = 0; I != NumRegs; ++I) { - Op = MachineOperand::CreateReg(VMI->second + I, false); - auto *FragmentExpr = DIExpression::createFragmentExpression( - Expr, Offset, RegisterSize); - FuncInfo.ArgDbgValues.push_back( - BuildMI(MF, DL, TII->get(TargetOpcode::DBG_VALUE), IsDbgDeclare, - Op->getReg(), Variable, FragmentExpr)); - Offset += RegisterSize; + auto RegisterVT = RFV.RegVTs.begin(); + for (auto RegCount : RFV.RegCount) { + unsigned RegisterSize = (RegisterVT++)->getSizeInBits(); + for (unsigned E = I + RegCount; I != E; ++I) { + // The vregs are guaranteed to be allocated in sequence. + Op = MachineOperand::CreateReg(VMI->second + I, false); + auto *FragmentExpr = DIExpression::createFragmentExpression( + Expr, Offset, RegisterSize); + FuncInfo.ArgDbgValues.push_back( + BuildMI(MF, DL, TII->get(TargetOpcode::DBG_VALUE), IsDbgDeclare, + Op->getReg(), Variable, FragmentExpr)); + Offset += RegisterSize; + } } return true; } |

