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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-25 04:03:38 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-25 04:03:38 +0000 |
commit | 95fd95cfe04e5f4e740981a68b77504f0693c05f (patch) | |
tree | 4696b532ce14da87613e6d750c710bf4b02b78e1 /llvm/lib/CodeGen | |
parent | 5d622fbcc166eeb31dcb1d06bc2ec49a1833817c (diff) | |
download | bcm5719-llvm-95fd95cfe04e5f4e740981a68b77504f0693c05f.tar.gz bcm5719-llvm-95fd95cfe04e5f4e740981a68b77504f0693c05f.zip |
GlobalISel: fewerElementsVector for a few more trivial ops
llvm-svn: 352165
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index e9d55ea889b..5be14018fb9 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -1407,6 +1407,12 @@ LegalizerHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx, case TargetOpcode::G_FDIV: case TargetOpcode::G_FREM: case TargetOpcode::G_FMA: + case TargetOpcode::G_FPOW: + case TargetOpcode::G_FEXP: + case TargetOpcode::G_FEXP2: + case TargetOpcode::G_FLOG: + case TargetOpcode::G_FLOG2: + case TargetOpcode::G_FLOG10: case TargetOpcode::G_FCEIL: { unsigned NarrowSize = NarrowTy.getSizeInBits(); unsigned DstReg = MI.getOperand(0).getReg(); |