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authorJeff Cohen <jeffc@jolt-lang.org>2006-02-04 16:20:31 +0000
committerJeff Cohen <jeffc@jolt-lang.org>2006-02-04 16:20:31 +0000
commit95ae171d5b0e4a5a8d36ccd17dbebfd0b4e983f7 (patch)
tree9488ff2e24678bd4fb09478b946a64f6fd52765e /llvm/lib/CodeGen
parentd30c4991a196ca9a46f0057715864dd5adfa3fe6 (diff)
downloadbcm5719-llvm-95ae171d5b0e4a5a8d36ccd17dbebfd0b4e983f7.tar.gz
bcm5719-llvm-95ae171d5b0e4a5a8d36ccd17dbebfd0b4e983f7.zip
Fix VC++ warning.
llvm-svn: 25975
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 58344872a53..15748705690 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -301,7 +301,6 @@ void ScheduleDAG::EmitNode(NodeInfo *NI) {
// Add all of the operand registers to the instruction.
for (unsigned i = 2; i != NumOps; i += 2) {
unsigned Flags =cast<ConstantSDNode>(Node->getOperand(i+1))->getValue();
- MachineOperand::UseType UseTy;
switch (Flags) {
default: assert(0 && "Bad flags!");
case 1: { // Use of register.
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