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| author | Andrew Trick <atrick@apple.com> | 2012-07-28 01:48:15 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-07-28 01:48:15 +0000 |
| commit | 940534371b2f266c8979503293558ef5d582f6d3 (patch) | |
| tree | 93cc54b83b595639f8c48ae50b7d0831b22a4aa4 /llvm/lib/CodeGen | |
| parent | 584745a692da7e40006d2dc155b9b2a70eeb6422 (diff) | |
| download | bcm5719-llvm-940534371b2f266c8979503293558ef5d582f6d3.tar.gz bcm5719-llvm-940534371b2f266c8979503293558ef5d582f6d3.zip | |
Reenable a basic SSA DAG builder optimization.
Jakob fixed ProcessImplicifDefs in r159149.
llvm-svn: 160910
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp index 110f478f48e..5b40cb4a7e2 100644 --- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -411,12 +411,11 @@ void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) { const MachineInstr *MI = SU->getInstr(); unsigned Reg = MI->getOperand(OperIdx).getReg(); - // SSA defs do not have output/anti dependencies. + // Singly defined vregs do not have output/anti dependencies. // The current operand is a def, so we have at least one. - // - // FIXME: This optimization is disabled pending PR13112. - //if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end()) - // return; + // Check here if there are any others... + if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end()) + return; // Add output dependence to the next nearest def of this vreg. // |
