diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2009-06-22 20:49:32 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-06-22 20:49:32 +0000 |
| commit | 8cbbc7944d30c38c2f8e235ebbcfb3fba9427f6a (patch) | |
| tree | 7ac4e94b179a9509deb49738b813a00c04e930ac /llvm/lib/CodeGen | |
| parent | 18eb69af7938137f5536d8d7cd5ef42d0397d8c5 (diff) | |
| download | bcm5719-llvm-8cbbc7944d30c38c2f8e235ebbcfb3fba9427f6a.tar.gz bcm5719-llvm-8cbbc7944d30c38c2f8e235ebbcfb3fba9427f6a.zip | |
Fix another register coalescer crash: forgot to check if the instruction being updated has already been coalesced.
llvm-svn: 73898
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp index 20348055bd9..c2105e617be 100644 --- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -739,6 +739,9 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg, // After updating the operand, check if the machine instruction has // become a copy. If so, update its val# information. + if (JoinedCopies.count(UseMI)) + continue; + const TargetInstrDesc &TID = UseMI->getDesc(); unsigned CopySrcReg, CopyDstReg, CopySrcSubIdx, CopyDstSubIdx; if (TID.getNumDefs() == 1 && TID.getNumOperands() > 2 && @@ -749,9 +752,10 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg, allocatableRegs_[CopyDstReg])) { LiveInterval &LI = li_->getInterval(CopyDstReg); unsigned DefIdx = li_->getDefIndex(li_->getInstructionIndex(UseMI)); - const LiveRange *DLR = LI.getLiveRangeContaining(DefIdx); - if (DLR->valno->def == DefIdx) - DLR->valno->copy = UseMI; + if (const LiveRange *DLR = LI.getLiveRangeContaining(DefIdx)) { + if (DLR->valno->def == DefIdx) + DLR->valno->copy = UseMI; + } } } } |

