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| author | Tim Renouf <tpr.llvm@botech.co.uk> | 2018-04-11 14:27:41 +0000 |
|---|---|---|
| committer | Tim Renouf <tpr.llvm@botech.co.uk> | 2018-04-11 14:27:41 +0000 |
| commit | 8ca33bfcf3fe4ea3e3f42a2f2da5f6cd5e47f18a (patch) | |
| tree | fb185ed2325421b70de66755e9fab9defdc00f43 /llvm/lib/CodeGen | |
| parent | 6df46f7665072941af4e15db0c590b92d91031c8 (diff) | |
| download | bcm5719-llvm-8ca33bfcf3fe4ea3e3f42a2f2da5f6cd5e47f18a.tar.gz bcm5719-llvm-8ca33bfcf3fe4ea3e3f42a2f2da5f6cd5e47f18a.zip | |
Revert "[AMDGPU] Ensure there are enough registers for wave dispatch"
This reverts 329808. That change caused a report of a failure in
test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir that I didn't see. I suspect
it is an expensive-check-only error.
Change-Id: I8133f26f15e7d5ec2b09c687c12cd70e918461b0
llvm-svn: 329811
Diffstat (limited to 'llvm/lib/CodeGen')
0 files changed, 0 insertions, 0 deletions
