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author | Sanjay Patel <spatel@rotateright.com> | 2018-10-15 16:54:07 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2018-10-15 16:54:07 +0000 |
commit | 8bd74785f0a29510805fa38a3e4f4bd8b6bceefd (patch) | |
tree | 94d7fce07d0f138ed31b449f95f22a609c2d6d6d /llvm/lib/CodeGen | |
parent | bc8aee15a29413eaef8b689273fa8f7603f995fc (diff) | |
download | bcm5719-llvm-8bd74785f0a29510805fa38a3e4f4bd8b6bceefd.tar.gz bcm5719-llvm-8bd74785f0a29510805fa38a3e4f4bd8b6bceefd.zip |
[DAGCombiner] allow undef elts in vector fmul matching
llvm-svn: 344534
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index ab871a25d07..11cc699ffe1 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -10898,7 +10898,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N) { auto isFMulNegTwo = [](SDValue FMul) { if (!FMul.hasOneUse() || FMul.getOpcode() != ISD::FMUL) return false; - auto *C = isConstOrConstSplatFP(FMul.getOperand(1)); + auto *C = isConstOrConstSplatFP(FMul.getOperand(1), true); return C && C->isExactlyValue(-2.0); }; |