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authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-06-09 20:05:00 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-06-09 20:05:00 +0000
commit8bc5eca3314f401cdb8bc1dcbe28554a5831c280 (patch)
treeec413738a55a2072e7af0eacd80fd315f2bc4c35 /llvm/lib/CodeGen
parenteee5f1fdacb9492ed825c81939ddf79c3f21771e (diff)
downloadbcm5719-llvm-8bc5eca3314f401cdb8bc1dcbe28554a5831c280.tar.gz
bcm5719-llvm-8bc5eca3314f401cdb8bc1dcbe28554a5831c280.zip
Mark physregs defined by inline asm as implicit.
This is a bit of a hack to make inline asm look more like call instructions. It would be better to produce correct dead flags during isel. llvm-svn: 105749
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
index 1febdb511ca..1c53dbd1b2b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
@@ -821,14 +821,18 @@ EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
case InlineAsm::Kind_RegDef:
for (; NumVals; --NumVals, ++i) {
unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
- MI->addOperand(MachineOperand::CreateReg(Reg, true));
+ // FIXME: Add dead flags for physical and virtual registers defined.
+ // For now, mark physical register defs as implicit to help fast
+ // regalloc. This makes inline asm look a lot like calls.
+ MI->addOperand(MachineOperand::CreateReg(Reg, true,
+ /*isImp=*/ TargetRegisterInfo::isPhysicalRegister(Reg)));
}
break;
case InlineAsm::Kind_RegDefEarlyClobber:
for (; NumVals; --NumVals, ++i) {
unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
MI->addOperand(MachineOperand::CreateReg(Reg, /*isDef=*/ true,
- /*isImp=*/ false,
+ /*isImp=*/ TargetRegisterInfo::isPhysicalRegister(Reg),
/*isKill=*/ false,
/*isDead=*/ false,
/*isUndef=*/false,
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