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author | Diana Picus <diana.picus@linaro.org> | 2016-12-16 12:54:46 +0000 |
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committer | Diana Picus <diana.picus@linaro.org> | 2016-12-16 12:54:46 +0000 |
commit | 812caee65a1c13ebaf4bc419ab1277523339bd27 (patch) | |
tree | df4e5e82ef5f191438f5c7062441ef8d6ab57326 /llvm/lib/CodeGen | |
parent | 85c921104381980518654110e9cd22f9134ba338 (diff) | |
download | bcm5719-llvm-812caee65a1c13ebaf4bc419ab1277523339bd27.tar.gz bcm5719-llvm-812caee65a1c13ebaf4bc419ab1277523339bd27.zip |
[ARM] GlobalISel: Select add i32, i32
Add the minimal support necessary to select a function that returns the sum of
two i32 values.
This includes some support for argument/return lowering of i32 values through
registers, as well as the handling of copy and add instructions throughout the
GlobalISel pipeline.
Differential Revision: https://reviews.llvm.org/D26677
llvm-svn: 289940
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp index 9149864817c..3b2177c72c4 100644 --- a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp +++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp @@ -43,6 +43,11 @@ bool InstructionSelector::constrainSelectedInstRegOperands( if (TRI.isPhysicalRegister(MO.getReg())) continue; + // Register operands with a value of 0 (e.g. predicate operands) don't need + // to be constrained. + if (MO.getReg() == 0) + continue; + const TargetRegisterClass *RC = TII.getRegClass(I.getDesc(), OpI, &TRI, MF); assert(RC && "Selected inst should have regclass operand"); |