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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-12-12 00:00:24 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-12-12 00:00:24 +0000 |
| commit | 810cb6296264b49b99aa24161f8fd6fdd2aa03d4 (patch) | |
| tree | 14bf3f44205fb5fda4d9a68a2e5357a8bba7aa80 /llvm/lib/CodeGen | |
| parent | 482f9be1758def59e03c2168aa43a1fb0a1a3f0c (diff) | |
| download | bcm5719-llvm-810cb6296264b49b99aa24161f8fd6fdd2aa03d4.tar.gz bcm5719-llvm-810cb6296264b49b99aa24161f8fd6fdd2aa03d4.zip | |
Add target hook for whether it is profitable to reduce load widths
Add an option to disable optimization to shrink truncated larger type
loads to smaller type loads. On SI this prevents using scalar load
instructions in some cases, since there are no scalar extloads.
llvm-svn: 224084
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 38a06618a8c..ed3d06cc920 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -6036,6 +6036,9 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { LN0->getMemoryVT().getSizeInBits() < ExtVT.getSizeInBits() + ShAmt) return SDValue(); + if (!TLI.shouldReduceLoadWidth(LN0, ExtType, ExtVT)) + return SDValue(); + EVT PtrType = N0.getOperand(1).getValueType(); if (PtrType == MVT::Untyped || PtrType.isExtended()) |
