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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-12-14 22:34:10 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-12-14 22:34:10 +0000 |
| commit | 7d7adf4f2e4e50f738a5f692e6f011dcfca6b070 (patch) | |
| tree | df846d9653c67e5bcd684da57d8dc97665c057b3 /llvm/lib/CodeGen | |
| parent | c7bc461298d540cefec9ffe370f68dfbca367e8b (diff) | |
| download | bcm5719-llvm-7d7adf4f2e4e50f738a5f692e6f011dcfca6b070.tar.gz bcm5719-llvm-7d7adf4f2e4e50f738a5f692e6f011dcfca6b070.zip | |
TLI: Allow using PSV for intrinsic mem operands
llvm-svn: 320756
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 1391677d012..a0d81366eb6 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -851,7 +851,7 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) { const TargetLowering &TLI = *MF->getSubtarget().getTargetLowering(); TargetLowering::IntrinsicInfo Info; // TODO: Add a GlobalISel version of getTgtMemIntrinsic. - if (TLI.getTgtMemIntrinsic(Info, CI, ID)) { + if (TLI.getTgtMemIntrinsic(Info, CI, *MF, ID)) { uint64_t Size = Info.memVT.getStoreSize(); MIB.addMemOperand(MF->getMachineMemOperand(MachinePointerInfo(Info.ptrVal), Info.flags, Size, Info.align)); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 3dc02f566a5..bb2abf283ad 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -4214,7 +4214,9 @@ void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I, // Info is set by getTgtMemInstrinsic TargetLowering::IntrinsicInfo Info; const TargetLowering &TLI = DAG.getTargetLoweringInfo(); - bool IsTgtIntrinsic = TLI.getTgtMemIntrinsic(Info, I, Intrinsic); + bool IsTgtIntrinsic = TLI.getTgtMemIntrinsic(Info, I, + DAG.getMachineFunction(), + Intrinsic); // Add the intrinsic ID as an integer operand if it's not a target intrinsic. if (!IsTgtIntrinsic || Info.opc == ISD::INTRINSIC_VOID || |
