[AArch64][GlobalISel] Select G_LOAD/G_STORE.

Mostly straightforward as we ignore addressing modes and just
use the base + unsigned immediate offset (always 0) variants.

This currently fails to select extloads because we have yet to
agree on a representation.

llvm-svn: 277171

1 files changed, 6 insertions, 2 deletions

diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
index 07a4b3d7170..5cb7e184a6c 100644
--- a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
@@ -31,9 +31,13 @@ bool InstructionSelector::constrainSelectedInstRegOperands(
 
   for (unsigned OpI = 0, OpE = I.getNumExplicitOperands(); OpI != OpE; ++OpI) {
     MachineOperand &MO = I.getOperand(OpI);
-    DEBUG(dbgs() << "Converting operand: " << MO << '\n');
 
-    assert(MO.isReg() && "Unsupported binop non-reg operand");
+    // There's nothing to be done on immediates.
+    if (MO.isImm())
+      continue;
+
+    DEBUG(dbgs() << "Converting operand: " << MO << '\n');
+    assert(MO.isReg() && "Unsupported non-reg operand");
 
     const TargetRegisterClass *RC = TII.getRegClass(I.getDesc(), OpI, &TRI, MF);
     assert(RC && "Selected inst should have regclass operand");