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| author | Dale Johannesen <dalej@apple.com> | 2007-05-16 22:45:30 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2007-05-16 22:45:30 +0000 |
| commit | 7a6c175e7af94f483b71f6d34a67c0d663829874 (patch) | |
| tree | 4e2c19ec71c90f27b3ddc1ba23b5a42df8b331f3 /llvm/lib/CodeGen | |
| parent | af7161042923d856f5bb359f9d9a3cdd44a22bc2 (diff) | |
| download | bcm5719-llvm-7a6c175e7af94f483b71f6d34a67c0d663829874.tar.gz bcm5719-llvm-7a6c175e7af94f483b71f6d34a67c0d663829874.zip | |
Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores.
llvm-svn: 37130
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index b3a448af84a..f6e0a2276f1 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2685,6 +2685,7 @@ SDOperand DAGCombiner::visitBIT_CONVERT(SDNode *N) { // fold (conv (load x)) -> (load (conv*)x) // If the resultant load doesn't need a higher alignment than the original! if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse() && + ISD::isUNINDEXEDLoad(N0.Val) && TLI.isOperationLegal(ISD::LOAD, VT)) { LoadSDNode *LN0 = cast<LoadSDNode>(N0); unsigned Align = TLI.getTargetMachine().getTargetData()-> @@ -3563,7 +3564,8 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) { // If this is a store of a bit convert, store the input value if the // resultant store does not need a higher alignment than the original. - if (Value.getOpcode() == ISD::BIT_CONVERT && !ST->isTruncatingStore()) { + if (Value.getOpcode() == ISD::BIT_CONVERT && !ST->isTruncatingStore() && + ST->getAddressingMode() == ISD::UNINDEXED) { unsigned Align = ST->getAlignment(); MVT::ValueType SVT = Value.getOperand(0).getValueType(); unsigned OrigAlign = TLI.getTargetMachine().getTargetData()-> |
