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authorSebastian Pop <sebpop@gmail.com>2016-12-21 01:41:12 +0000
committerSebastian Pop <sebpop@gmail.com>2016-12-21 01:41:12 +0000
commit77794843134ecfb62de53df934346815ba634481 (patch)
tree913378b4946074f29ca33384679fa2a5ce03be4b /llvm/lib/CodeGen
parent16d315085243f2fed77e386a8b4077accc1cde7a (diff)
downloadbcm5719-llvm-77794843134ecfb62de53df934346815ba634481.tar.gz
bcm5719-llvm-77794843134ecfb62de53df934346815ba634481.zip
machine combiner: fix pretty printer
we used to print UNKNOWN instructions when the instruction to be printer was not yet inserted in any BB: in that case the pretty printer would not be able to compute a TII as the instruction does not belong to any BB or function yet. This patch explicitly passes the TII to the pretty-printer. Differential Revision: https://reviews.llvm.org/D27645 llvm-svn: 290228
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/MachineCombiner.cpp2
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp16
2 files changed, 10 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp
index 54c4741e6fa..5beed5f5dd0 100644
--- a/llvm/lib/CodeGen/MachineCombiner.cpp
+++ b/llvm/lib/CodeGen/MachineCombiner.cpp
@@ -135,7 +135,7 @@ MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
// are tracked in the InstrIdxForVirtReg map depth is looked up in InstrDepth
for (auto *InstrPtr : InsInstrs) { // for each Use
unsigned IDepth = 0;
- DEBUG(dbgs() << "NEW INSTR "; InstrPtr->dump(); dbgs() << "\n";);
+ DEBUG(dbgs() << "NEW INSTR "; InstrPtr->dump(TII); dbgs() << "\n";);
for (const MachineOperand &MO : InstrPtr->operands()) {
// Check for virtual register operand.
if (!(MO.isReg() && TargetRegisterInfo::isVirtualRegister(MO.getReg())))
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 70ef3563f1a..d2ce001103d 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -1692,29 +1692,30 @@ void MachineInstr::copyImplicitOps(MachineFunction &MF,
}
}
-LLVM_DUMP_METHOD void MachineInstr::dump() const {
+LLVM_DUMP_METHOD void MachineInstr::dump(const TargetInstrInfo *TII) const {
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
- dbgs() << " " << *this;
+ dbgs() << " ";
+ print(dbgs(), false /* SkipOpers */, TII);
#endif
}
-void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
+void MachineInstr::print(raw_ostream &OS, bool SkipOpers,
+ const TargetInstrInfo *TII) const {
const Module *M = nullptr;
if (const MachineBasicBlock *MBB = getParent())
if (const MachineFunction *MF = MBB->getParent())
M = MF->getFunction()->getParent();
ModuleSlotTracker MST(M);
- print(OS, MST, SkipOpers);
+ print(OS, MST, SkipOpers, TII);
}
void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
- bool SkipOpers) const {
+ bool SkipOpers, const TargetInstrInfo *TII) const {
// We can be a bit tidier if we know the MachineFunction.
const MachineFunction *MF = nullptr;
const TargetRegisterInfo *TRI = nullptr;
const MachineRegisterInfo *MRI = nullptr;
- const TargetInstrInfo *TII = nullptr;
const TargetIntrinsicInfo *IntrinsicInfo = nullptr;
if (const MachineBasicBlock *MBB = getParent()) {
@@ -1722,7 +1723,8 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
if (MF) {
MRI = &MF->getRegInfo();
TRI = MF->getSubtarget().getRegisterInfo();
- TII = MF->getSubtarget().getInstrInfo();
+ if (!TII)
+ TII = MF->getSubtarget().getInstrInfo();
IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
}
}
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