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authorAditya Nandakumar <aditya_nandakumar@apple.com>2019-08-13 04:32:33 +0000
committerAditya Nandakumar <aditya_nandakumar@apple.com>2019-08-13 04:32:33 +0000
commit70fdfed45f040bf27787a0fc4ebc8f483298bde3 (patch)
tree67e1d35ef73eda3ea37b8e215573510b8b31d589 /llvm/lib/CodeGen
parent8b996dc16ee4ed16922b33c616b3c21911438d5f (diff)
downloadbcm5719-llvm-70fdfed45f040bf27787a0fc4ebc8f483298bde3.tar.gz
bcm5719-llvm-70fdfed45f040bf27787a0fc4ebc8f483298bde3.zip
[GlobalISel]: Add KnownBits for G_XOR
https://reviews.llvm.org/D66119 llvm-svn: 368648
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp13
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
index aef43568b63..31e28f5ed5c 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
@@ -131,6 +131,19 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
Known.Zero.setLowBits(KnownZeroLow);
break;
}
+ case TargetOpcode::G_XOR: {
+ computeKnownBitsImpl(MI.getOperand(2).getReg(), Known, DemandedElts,
+ Depth + 1);
+ computeKnownBitsImpl(MI.getOperand(1).getReg(), Known2, DemandedElts,
+ Depth + 1);
+
+ // Output known-0 bits are known if clear or set in both the LHS & RHS.
+ APInt KnownZeroOut = (Known.Zero & Known2.Zero) | (Known.One & Known2.One);
+ // Output known-1 are known to be set if set in only one of the LHS, RHS.
+ Known.One = (Known.Zero & Known2.One) | (Known.One & Known2.Zero);
+ Known.Zero = KnownZeroOut;
+ break;
+ }
// G_GEP is like G_ADD. FIXME: Is this true for all targets?
case TargetOpcode::G_GEP:
case TargetOpcode::G_ADD: {
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