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author | Chris Lattner <sabre@nondot.org> | 2001-09-11 23:22:43 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2001-09-11 23:22:43 +0000 |
commit | 706ee8e5ec05e25b650888faac6e766f1e198b7b (patch) | |
tree | 75ee399bf57e056b6f41ceb242132a4c1219446f /llvm/lib/CodeGen | |
parent | a7d3b8dca149d2097627e3ba2e13bb76826f1bd1 (diff) | |
download | bcm5719-llvm-706ee8e5ec05e25b650888faac6e766f1e198b7b.tar.gz bcm5719-llvm-706ee8e5ec05e25b650888faac6e766f1e198b7b.zip |
Eliminate MainTreeNode function
llvm-svn: 550
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 3 |
2 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp b/llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp index dbb0f8672a6..e6884ab572a 100644 --- a/llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp +++ b/llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp @@ -220,7 +220,7 @@ SelectInstructionsForTree(BasicTreeNode* treeRoot, // if (treeRoot->opLabel != VRegListOp) { - InstructionNode* instrNode = (InstructionNode*) MainTreeNode(treeRoot); + InstructionNode* instrNode = (InstructionNode*)treeRoot->treeNodePtr; assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode); unsigned N = GetInstructionsByRule(instrNode, ruleForNode, nts, Target, @@ -259,7 +259,7 @@ SelectInstructionsForTree(BasicTreeNode* treeRoot, { assert(i < 2); InstrTreeNode::InstrTreeNodeType - nodeType = MainTreeNode(kids[i])->getNodeType(); + nodeType = kids[i]->treeNodePtr->getNodeType(); if (nodeType == InstrTreeNode::NTVRegListNode || nodeType == InstrTreeNode::NTInstructionNode) { diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 63acea14b41..e5b768eca99 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -153,7 +153,8 @@ ostream &operator<<(ostream &os, const MachineOperand &mop) { // // For the common case of 2- and 3-operand arithmetic/logical instructions, // set the m/c instr. operands directly from the VM instruction's operands. -// Check whether the first or second operand is 0 and can use a dedicated "0" register. +// Check whether the first or second operand is 0 and can use a dedicated "0" +// register. // Check whether the second operand should use an immediate field or register. // (First and third operands are never immediates for such instructions.) // |