summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
diff options
context:
space:
mode:
authorEli Friedman <eli.friedman@gmail.com>2008-12-17 03:35:17 +0000
committerEli Friedman <eli.friedman@gmail.com>2008-12-17 03:35:17 +0000
commit6cf404f2d1d4973989483999ed74fe73887f7dc2 (patch)
tree41885b36c3e4845de19acd9c98a9e148aecccaa8 /llvm/lib/CodeGen
parent0b9d8f8c213bcff4989661a6ad08803cbfa461db (diff)
downloadbcm5719-llvm-6cf404f2d1d4973989483999ed74fe73887f7dc2.tar.gz
bcm5719-llvm-6cf404f2d1d4973989483999ed74fe73887f7dc2.zip
Fix for PR3225: disable a broken optimization in
DAGTypeLegalizer::ExpandShiftWithKnownAmountBit. In terms of restoring the optimization, the best fix here isn't obvious... any ideas? llvm-svn: 61119
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 8e864050ed9..8abf1448dbc 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -1211,6 +1211,8 @@ ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) {
}
}
+#if 0
+ // FIXME: This code is broken for shifts with a zero amount!
// If we know that all of the high bits of the shift amount are zero, then we
// can do this as a couple of simple shifts.
if ((KnownZero & HighBitMask) == HighBitMask) {
@@ -1232,6 +1234,7 @@ ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) {
DAG.getNode(Op2, NVT, InL, Amt2));
return true;
}
+#endif
return false;
}
OpenPOWER on IntegriCloud