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author | Duncan Sands <baldrick@free.fr> | 2011-11-09 14:20:48 +0000 |
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committer | Duncan Sands <baldrick@free.fr> | 2011-11-09 14:20:48 +0000 |
commit | 635e4efca0343bbd1fb7c1792e33cdedbecca5ca (patch) | |
tree | 6d354b0693c006dafe4659282dc09eef917ecaf7 /llvm/lib/CodeGen | |
parent | 79135d844d0183a4d23610583167d4323b723314 (diff) | |
download | bcm5719-llvm-635e4efca0343bbd1fb7c1792e33cdedbecca5ca.tar.gz bcm5719-llvm-635e4efca0343bbd1fb7c1792e33cdedbecca5ca.zip |
Speculatively revert commit 144124 (djg) in the hope that the 32 bit
dragonegg self-host buildbot will recover (it is complaining about object
files differing between different build stages). Original commit message:
Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.
llvm-svn: 144188
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 16 |
1 files changed, 3 insertions, 13 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index f965a5e8ab5..cab303dd5c3 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -1666,7 +1666,7 @@ public: protected: bool canClobber(const SUnit *SU, const SUnit *Op); - void AddPseudoTwoAddrDeps(const TargetInstrInfo *TII); + void AddPseudoTwoAddrDeps(); void PrescheduleNodesWithMultipleUses(); void CalculateSethiUllmanNumbers(); }; @@ -2628,7 +2628,7 @@ bool ilp_ls_rr_sort::operator()(SUnit *left, SUnit *right) const { void RegReductionPQBase::initNodes(std::vector<SUnit> &sunits) { SUnits = &sunits; // Add pseudo dependency edges for two-address nodes. - AddPseudoTwoAddrDeps(TII); + AddPseudoTwoAddrDeps(); // Reroute edges to nodes with multiple uses. if (!TracksRegPressure) PrescheduleNodesWithMultipleUses(); @@ -2855,17 +2855,7 @@ void RegReductionPQBase::PrescheduleNodesWithMultipleUses() { /// one that has a CopyToReg use (more likely to be a loop induction update). /// If both are two-address, but one is commutable while the other is not /// commutable, favor the one that's not commutable. -void RegReductionPQBase::AddPseudoTwoAddrDeps(const TargetInstrInfo *TII) { - // If the graph contains any calls, disable this optimization. - // FIXME: This is a kludge to work around the fact that the artificial edges - // can combine with the way call sequences use physical register dependencies - // to model their resource usage to create unschedulable graphs. - for (unsigned i = 0, e = SUnits->size(); i != e; ++i) - for (SDNode *Node = (*SUnits)[i].getNode(); Node; Node = Node->getGluedNode()) - if (Node->isMachineOpcode() && - Node->getMachineOpcode() == (unsigned)TII->getCallFrameSetupOpcode()) - return; - +void RegReductionPQBase::AddPseudoTwoAddrDeps() { for (unsigned i = 0, e = SUnits->size(); i != e; ++i) { SUnit *SU = &(*SUnits)[i]; if (!SU->isTwoAddress) |