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author | Chris Lattner <sabre@nondot.org> | 2008-08-26 06:07:47 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2008-08-26 06:07:47 +0000 |
commit | 54ef9f583197209464127478fd02c0f2fe0938b9 (patch) | |
tree | dceb9d8b6e46e5bd756bf421fdf58e9b47657e8d /llvm/lib/CodeGen | |
parent | 3b4fdb09516a14290fa0cec9128148150fa63f3e (diff) | |
download | bcm5719-llvm-54ef9f583197209464127478fd02c0f2fe0938b9.tar.gz bcm5719-llvm-54ef9f583197209464127478fd02c0f2fe0938b9.zip |
typo fix.
llvm-svn: 55355
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 7ec5b8534dd..f35c8d867df 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -4231,7 +4231,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { if (!SawEarlyClobber && OpInfo.Type == InlineAsm::isClobber && OpInfo.ConstraintType == TargetLowering::C_Register) { - // Note that we want to ignore things that we don't trick here, like + // Note that we want to ignore things that we don't track here, like // dirflag, fpsr, flags, etc. std::pair<unsigned, const TargetRegisterClass*> PhysReg = TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode, |