diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-26 21:33:36 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-26 21:33:36 +0000 |
| commit | 53fae0772a0e6b37385950b3118fbfbffc8f1026 (patch) | |
| tree | e0563932c88ef9e7b105452295f609304ad2e4b8 /llvm/lib/CodeGen | |
| parent | 304392621bae517fdc3db6abc4e4acf5edc4fe5a (diff) | |
| download | bcm5719-llvm-53fae0772a0e6b37385950b3118fbfbffc8f1026.tar.gz bcm5719-llvm-53fae0772a0e6b37385950b3118fbfbffc8f1026.zip | |
RenameIndependentSubregs: Fix iterator problem
Fixes bug 33597.
Use of substituteRegister in the tied operand case messes
up the register use iterator, causing some uses to be left
unprocessed.
llvm-svn: 306333
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/RenameIndependentSubregs.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/RenameIndependentSubregs.cpp b/llvm/lib/CodeGen/RenameIndependentSubregs.cpp index d2eff950d86..a5abd500080 100644 --- a/llvm/lib/CodeGen/RenameIndependentSubregs.cpp +++ b/llvm/lib/CodeGen/RenameIndependentSubregs.cpp @@ -247,6 +247,9 @@ void RenameIndependentSubregs::rewriteOperands(const IntEqClasses &Classes, /// Undef use operands are not tracked in the equivalence class but need /// to be update if they are tied. MO.getParent()->substituteRegister(Reg, VReg, 0, TRI); + + // substituteRegister breaks the iterator, so restart. + I = MRI->reg_nodbg_begin(Reg); } } // TODO: We could attempt to recompute new register classes while visiting |
