diff options
| author | Renato Golin <renato.golin@linaro.org> | 2014-10-03 12:20:53 +0000 |
|---|---|---|
| committer | Renato Golin <renato.golin@linaro.org> | 2014-10-03 12:20:53 +0000 |
| commit | 4e31ae105112dc6cce0e25f21e77d336deb4e833 (patch) | |
| tree | 8d5028b2e82f7a47c2dccefb0b5ce4f88b6fa748 /llvm/lib/CodeGen | |
| parent | 4bf341de3c0fa43b117cccd40b4273218ed43883 (diff) | |
| download | bcm5719-llvm-4e31ae105112dc6cce0e25f21e77d336deb4e833.tar.gz bcm5719-llvm-4e31ae105112dc6cce0e25f21e77d336deb4e833.zip | |
Revert 202433 - Provide a target override for the latest regalloc heuristic
That commit was introduced in order to help investigate a problem in ARM
codegen breaking from commit 202304 (Add a limit to the heuristic that register
allocates instructions in local order). Recent analisys indicated that the
problem no longer exists, so I'm reverting this change.
See PR18996.
llvm-svn: 218981
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocGreedy.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp index 655a2c4c8b0..223c5e159a7 100644 --- a/llvm/lib/CodeGen/RegAllocGreedy.cpp +++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp @@ -514,7 +514,7 @@ void RAGreedy::enqueue(PQueue &CurQueue, LiveInterval *LI) { // Giant live ranges fall back to the global assignment heuristic, which // prevents excessive spilling in pathological cases. bool ReverseLocal = TRI->reverseLocalAssignment(); - bool ForceGlobal = !ReverseLocal && TRI->mayOverrideLocalAssignment() && + bool ForceGlobal = !ReverseLocal && (Size / SlotIndex::InstrDist) > (2 * MRI->getRegClass(Reg)->getNumRegs()); if (ExtraRegInfo[Reg].Stage == RS_Assign && !ForceGlobal && !LI->empty() && |
