summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
diff options
context:
space:
mode:
authorEli Friedman <eli.friedman@gmail.com>2009-06-19 06:01:55 +0000
committerEli Friedman <eli.friedman@gmail.com>2009-06-19 06:01:55 +0000
commit495d02f4a63391890756b0ff2bfadce2f4e349a8 (patch)
treeb049581679979190b5fd6457ed883b6dfdfde594 /llvm/lib/CodeGen
parent54fb536b5c191317a4544e26964189a67a09cdcf (diff)
downloadbcm5719-llvm-495d02f4a63391890756b0ff2bfadce2f4e349a8.tar.gz
bcm5719-llvm-495d02f4a63391890756b0ff2bfadce2f4e349a8.zip
Minor cleanup; fixes review comments for a previous patch. Sorry for
taking so long to get to this! llvm-svn: 73757
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp7
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
index b7d7818d6e0..6e5adee84c3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
@@ -95,14 +95,13 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
if (InVT.isVector() && OutVT.isInteger()) {
// Handle cases like i64 = BIT_CONVERT v1i64 on x86, where the operand
// is legal but the result is not.
- MVT NVT = MVT::getVectorVT(TLI.getTypeToTransformTo(OutVT), 2);
+ MVT NVT = MVT::getVectorVT(NOutVT, 2);
if (isTypeLegal(NVT)) {
SDValue CastInOp = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, InOp);
- MVT EltNVT = NVT.getVectorElementType();
- Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltNVT, CastInOp,
+ Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NOutVT, CastInOp,
DAG.getIntPtrConstant(0));
- Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltNVT, CastInOp,
+ Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NOutVT, CastInOp,
DAG.getIntPtrConstant(1));
if (TLI.isBigEndian())
OpenPOWER on IntegriCloud