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| author | Dan Gohman <gohman@apple.com> | 2009-08-18 23:36:17 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-08-18 23:36:17 +0000 |
| commit | 4906f73a9f2a0c788428b92187707b394a4d022a (patch) | |
| tree | 4849451c732b2a9d8c910d04efcac41dc8c74249 /llvm/lib/CodeGen | |
| parent | 17a6fd2299625fb220e6888683878d8df691141b (diff) | |
| download | bcm5719-llvm-4906f73a9f2a0c788428b92187707b394a4d022a.tar.gz bcm5719-llvm-4906f73a9f2a0c788428b92187707b394a4d022a.zip | |
Legalize the shift amount operand of SRL_PARTS, SHL_PARTS, and
SRA_PARTS, as is done for SRL, SHL, and SRA.
llvm-svn: 79380
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 1efeb76e365..07a6b2c5cc5 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -898,6 +898,13 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { if (!Ops[1].getValueType().isVector()) Ops[1] = LegalizeOp(DAG.getShiftAmountOperand(Ops[1])); break; + case ISD::SRL_PARTS: + case ISD::SRA_PARTS: + case ISD::SHL_PARTS: + // Legalizing shifts/rotates requires adjusting the shift amount + // to the appropriate width. + if (!Ops[2].getValueType().isVector()) + Ops[2] = LegalizeOp(DAG.getShiftAmountOperand(Ops[2])); } Result = DAG.UpdateNodeOperands(Result.getValue(0), Ops.data(), |
