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authorCraig Topper <craig.topper@intel.com>2018-10-12 21:59:55 +0000
committerCraig Topper <craig.topper@intel.com>2018-10-12 21:59:55 +0000
commit435e38a5df057385d2e2d6471c330af1bf43306b (patch)
tree49b8a5130d631c25b87737bee8dc3d113ddefd80 /llvm/lib/CodeGen
parentd85038871014e75abe4e1c3a1b419ef19b0d048e (diff)
downloadbcm5719-llvm-435e38a5df057385d2e2d6471c330af1bf43306b.tar.gz
bcm5719-llvm-435e38a5df057385d2e2d6471c330af1bf43306b.zip
[LegalizeVectorTypes] When widening the result of a bitcast from a scalar type, use a scalar_to_vector to turn the scalar into a vector intead of a build vector full of mostly undefs.
This is more consistent with what we usually do and matches some code X86 custom emits in some cases that I think I can cleanup. The MIPS test change just looks to be an instruction ordering change. llvm-svn: 344422
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp26
1 files changed, 12 insertions, 14 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index 310f5ef5dc7..f4cad796863 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -3022,22 +3022,20 @@ SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
}
if (TLI.isTypeLegal(NewInVT)) {
- // Because the result and the input are different vector types, widening
- // the result could create a legal type but widening the input might make
- // it an illegal type that might lead to repeatedly splitting the input
- // and then widening it. To avoid this, we widen the input only if
- // it results in a legal type.
- SmallVector<SDValue, 16> Ops(NewNumElts);
- SDValue UndefVal = DAG.getUNDEF(InVT);
- Ops[0] = InOp;
- for (unsigned i = 1; i < NewNumElts; ++i)
- Ops[i] = UndefVal;
-
SDValue NewVec;
- if (InVT.isVector())
+ if (InVT.isVector()) {
+ // Because the result and the input are different vector types, widening
+ // the result could create a legal type but widening the input might make
+ // it an illegal type that might lead to repeatedly splitting the input
+ // and then widening it. To avoid this, we widen the input only if
+ // it results in a legal type.
+ SmallVector<SDValue, 16> Ops(NewNumElts, DAG.getUNDEF(InVT));
+ Ops[0] = InOp;
+
NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewInVT, Ops);
- else
- NewVec = DAG.getBuildVector(NewInVT, dl, Ops);
+ } else {
+ NewVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewInVT, InOp);
+ }
return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
}
}
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