[RegisterBankInfo] Uniquely generate OperandsMapping.

This is a step toward statically allocate InstructionMapping. Like the
previous few commits, the goal is to move toward a TableGen'ed like
structure with no dynamic allocation at all.

This should already improve compile time by getting rid of a bunch of
memmove of SmallVectors.

llvm-svn: 282643

1 files changed, 63 insertions, 8 deletions

diff --git a/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp b/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
index 4406e3f9197..b550436ca49 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
@@ -41,6 +41,10 @@ STATISTIC(NumValueMappingsCreated,
           "Number of value mappings dynamically created");
 STATISTIC(NumValueMappingsAccessed,
           "Number of value mappings dynamically accessed");
+STATISTIC(NumOperandsMappingsCreated,
+          "Number of operands mappings dynamically created");
+STATISTIC(NumOperandsMappingsAccessed,
+          "Number of operands mappings dynamically accessed");
 
 const unsigned RegisterBankInfo::DefaultMappingID = UINT_MAX;
 const unsigned RegisterBankInfo::InvalidMappingID = UINT_MAX - 1;
@@ -233,6 +237,7 @@ const TargetRegisterClass *RegisterBankInfo::constrainGenericRegister(
 RegisterBankInfo::InstructionMapping
 RegisterBankInfo::getInstrMappingImpl(const MachineInstr &MI) const {
   RegisterBankInfo::InstructionMapping Mapping(DefaultMappingID, /*Cost*/ 1,
+                                               /*OperandsMapping*/ nullptr,
                                                MI.getNumOperands());
   const MachineFunction &MF = *MI.getParent()->getParent();
   const TargetSubtargetInfo &STI = MF.getSubtarget();
@@ -251,7 +256,10 @@ RegisterBankInfo::getInstrMappingImpl(const MachineInstr &MI) const {
   const RegisterBank *RegBank = nullptr;
   // Remember the size of the register for reuse for copy-like instructions.
   unsigned RegSize = 0;
-  for (unsigned OpIdx = 0, End = MI.getNumOperands(); OpIdx != End; ++OpIdx) {
+
+  unsigned NumOperands = MI.getNumOperands();
+  SmallVector<const ValueMapping *, 8> OperandsMapping(NumOperands);
+  for (unsigned OpIdx = 0; OpIdx != NumOperands; ++OpIdx) {
     const MachineOperand &MO = MI.getOperand(OpIdx);
     if (!MO.isReg())
       continue;
@@ -289,11 +297,13 @@ RegisterBankInfo::getInstrMappingImpl(const MachineInstr &MI) const {
     }
     RegBank = CurRegBank;
     RegSize = getSizeInBits(Reg, MRI, TRI);
-    Mapping.setOperandMapping(OpIdx, getValueMapping(0, RegSize, *CurRegBank));
+    OperandsMapping[OpIdx] = &getValueMapping(0, RegSize, *CurRegBank);
   }
 
-  if (CompleteMapping)
+  if (CompleteMapping) {
+    Mapping.setOperandsMapping(getOperandsMapping(OperandsMapping));
     return Mapping;
+  }
 
   assert(isCopyLike && "We should have bailed on non-copies at this point");
   // For copy like instruction, if none of the operand has a register
@@ -304,18 +314,19 @@ RegisterBankInfo::getInstrMappingImpl(const MachineInstr &MI) const {
   // This is a copy-like instruction.
   // Propagate RegBank to all operands that do not have a
   // mapping yet.
-  for (unsigned OpIdx = 0, End = MI.getNumOperands(); OpIdx != End; ++OpIdx) {
+  for (unsigned OpIdx = 0; OpIdx != NumOperands; ++OpIdx) {
     const MachineOperand &MO = MI.getOperand(OpIdx);
     // Don't assign a mapping for non-reg operands.
     if (!MO.isReg())
       continue;
 
     // If a mapping already exists, do not touch it.
-    if (Mapping.isOperandMappingSet(OpIdx))
+    if (OperandsMapping[OpIdx])
       continue;
 
-    Mapping.setOperandMapping(OpIdx, getValueMapping(0, RegSize, *RegBank));
+    OperandsMapping[OpIdx] = &getValueMapping(0, RegSize, *RegBank);
   }
+  Mapping.setOperandsMapping(getOperandsMapping(OperandsMapping));
   return Mapping;
 }
 
@@ -383,6 +394,50 @@ RegisterBankInfo::getValueMapping(const PartialMapping *BreakDown,
   return *ValMapping;
 }
 
+template <typename Iterator>
+const RegisterBankInfo::ValueMapping *
+RegisterBankInfo::getOperandsMapping(Iterator Begin, Iterator End) const {
+
+  ++NumOperandsMappingsAccessed;
+
+  // The addresses of the value mapping are unique.
+  // Therefore, we can use them directly to hash the operand mapping.
+  hash_code Hash = hash_combine_range(Begin, End);
+  const auto &It = MapOfOperandsMappings.find(Hash);
+  if (It != MapOfOperandsMappings.end())
+    return It->second;
+
+  ++NumOperandsMappingsCreated;
+
+  // Create the array of ValueMapping.
+  // Note: this array will not hash to this instance of operands
+  // mapping, because we use the pointer of the ValueMapping
+  // to hash and we expect them to uniquely identify an instance
+  // of value mapping.
+  ValueMapping *&Res = MapOfOperandsMappings[Hash];
+  Res = new ValueMapping[std::distance(Begin, End)];
+  unsigned Idx = 0;
+  for (Iterator It = Begin; It != End; ++It, ++Idx) {
+    const ValueMapping *ValMap = *It;
+    if (!ValMap)
+      continue;
+    Res[Idx] = *ValMap;
+  }
+  return Res;
+}
+
+const RegisterBankInfo::ValueMapping *RegisterBankInfo::getOperandsMapping(
+    const SmallVectorImpl<const RegisterBankInfo::ValueMapping *> &OpdsMapping)
+    const {
+  return getOperandsMapping(OpdsMapping.begin(), OpdsMapping.end());
+}
+
+const RegisterBankInfo::ValueMapping *RegisterBankInfo::getOperandsMapping(
+    std::initializer_list<const RegisterBankInfo::ValueMapping *> OpdsMapping)
+    const {
+  return getOperandsMapping(OpdsMapping.begin(), OpdsMapping.end());
+}
+
 RegisterBankInfo::InstructionMapping
 RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     RegisterBankInfo::InstructionMapping Mapping = getInstrMappingImpl(MI);
@@ -546,14 +601,14 @@ bool RegisterBankInfo::InstructionMapping::verify(
   for (unsigned Idx = 0; Idx < NumOperands; ++Idx) {
     const MachineOperand &MO = MI.getOperand(Idx);
     if (!MO.isReg()) {
-      assert(!isOperandMappingSet(Idx) &&
+      assert(!getOperandMapping(Idx).isValid() &&
              "We should not care about non-reg mapping");
       continue;
     }
     unsigned Reg = MO.getReg();
     if (!Reg)
       continue;
-    assert(isOperandMappingSet(Idx) &&
+    assert(getOperandMapping(Idx).isValid() &&
            "We must have a mapping for reg operands");
     const RegisterBankInfo::ValueMapping &MOMapping = getOperandMapping(Idx);
     (void)MOMapping;