diff options
| author | Sanjay Patel <spatel@rotateright.com> | 2016-01-06 00:45:42 +0000 | 
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-01-06 00:45:42 +0000 | 
| commit | 3d07ec973f045f1f38b982c82aa3332466ce45d4 (patch) | |
| tree | d4a9d15f3b95e86fd532af58e4dd433268f2081f /llvm/lib/CodeGen | |
| parent | 797f639e79a90b59c3eea67e1577012b4cde77e0 (diff) | |
| download | bcm5719-llvm-3d07ec973f045f1f38b982c82aa3332466ce45d4.tar.gz bcm5719-llvm-3d07ec973f045f1f38b982c82aa3332466ce45d4.zip | |
rangify; NFCI
llvm-svn: 256891
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/MachineCSE.cpp | 38 | 
1 files changed, 14 insertions, 24 deletions
| diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp index 021707b7c3c..aad376c4702 100644 --- a/llvm/lib/CodeGen/MachineCSE.cpp +++ b/llvm/lib/CodeGen/MachineCSE.cpp @@ -122,8 +122,7 @@ INITIALIZE_PASS_END(MachineCSE, "machine-cse",  bool MachineCSE::PerformTrivialCopyPropagation(MachineInstr *MI,                                                 MachineBasicBlock *MBB) {    bool Changed = false; -  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { -    MachineOperand &MO = MI->getOperand(i); +  for (MachineOperand &MO : MI->operands()) {      if (!MO.isReg() || !MO.isUse())        continue;      unsigned Reg = MO.getReg(); @@ -186,8 +185,7 @@ MachineCSE::isPhysDefTriviallyDead(unsigned Reg,        return true;      bool SeenDef = false; -    for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { -      const MachineOperand &MO = I->getOperand(i); +    for (const MachineOperand &MO : I->operands()) {        if (MO.isRegMask() && MO.clobbersPhysReg(Reg))          SeenDef = true;        if (!MO.isReg() || !MO.getReg()) @@ -220,8 +218,7 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,                                         SmallVectorImpl<unsigned> &PhysDefs,                                         bool &PhysUseDef) const{    // First, add all uses to PhysRefs. -  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { -    const MachineOperand &MO = MI->getOperand(i); +  for (const MachineOperand &MO : MI->operands()) {      if (!MO.isReg() || MO.isDef())        continue;      unsigned Reg = MO.getReg(); @@ -239,8 +236,7 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,    // (which currently contains only uses), set the PhysUseDef flag.    PhysUseDef = false;    MachineBasicBlock::const_iterator I = MI; I = std::next(I); -  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { -    const MachineOperand &MO = MI->getOperand(i); +  for (const MachineOperand &MO : MI->operands()) {      if (!MO.isReg() || !MO.isDef())        continue;      unsigned Reg = MO.getReg(); @@ -311,8 +307,7 @@ bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,      if (I == E)        return true; -    for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { -      const MachineOperand &MO = I->getOperand(i); +    for (const MachineOperand &MO : I->operands()) {        // RegMasks go on instructions like calls that clobber lots of physregs.        // Don't attempt to CSE across such an instruction.        if (MO.isRegMask()) @@ -398,8 +393,7 @@ bool MachineCSE::isProfitableToCSE(unsigned CSReg, unsigned Reg,    // Heuristics #2: If the expression doesn't not use a vr and the only use    // of the redundant computation are copies, do not cse.    bool HasVRegUse = false; -  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { -    const MachineOperand &MO = MI->getOperand(i); +  for (const MachineOperand &MO : MI->operands()) {      if (MO.isReg() && MO.isUse() &&          TargetRegisterInfo::isVirtualRegister(MO.getReg())) {        HasVRegUse = true; @@ -580,9 +574,9 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {      // Actually perform the elimination.      if (DoCSE) { -      for (unsigned i = 0, e = CSEPairs.size(); i != e; ++i) { -        unsigned OldReg = CSEPairs[i].first; -        unsigned NewReg = CSEPairs[i].second; +      for (std::pair<unsigned, unsigned> &CSEPair : CSEPairs) { +        unsigned OldReg = CSEPair.first; +        unsigned NewReg = CSEPair.second;          // OldReg may have been unused but is used now, clear the Dead flag          MachineInstr *Def = MRI->getUniqueVRegDef(NewReg);          assert(Def != nullptr && "CSEd register has no unique definition?"); @@ -594,8 +588,8 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {        // Go through implicit defs of CSMI and MI, if a def is not dead at MI,        // we should make sure it is not dead at CSMI. -      for (unsigned i = 0, e = ImplicitDefsToUpdate.size(); i != e; ++i) -        CSMI->getOperand(ImplicitDefsToUpdate[i]).setIsDead(false); +      for (unsigned ImplicitDefToUpdate : ImplicitDefsToUpdate) +        CSMI->getOperand(ImplicitDefToUpdate).setIsDead(false);        // Go through implicit defs of CSMI and MI, and clear the kill flags on        // their uses in all the instructions between CSMI and MI. @@ -685,18 +679,14 @@ bool MachineCSE::PerformCSE(MachineDomTreeNode *Node) {      Node = WorkList.pop_back_val();      Scopes.push_back(Node);      const std::vector<MachineDomTreeNode*> &Children = Node->getChildren(); -    unsigned NumChildren = Children.size(); -    OpenChildren[Node] = NumChildren; -    for (unsigned i = 0; i != NumChildren; ++i) { -      MachineDomTreeNode *Child = Children[i]; +    OpenChildren[Node] = Children.size(); +    for (MachineDomTreeNode *Child : Children)        WorkList.push_back(Child); -    }    } while (!WorkList.empty());    // Now perform CSE.    bool Changed = false; -  for (unsigned i = 0, e = Scopes.size(); i != e; ++i) { -    MachineDomTreeNode *Node = Scopes[i]; +  for (MachineDomTreeNode *Node : Scopes) {      MachineBasicBlock *MBB = Node->getBlock();      EnterScope(MBB);      Changed |= ProcessBlock(MBB); | 

