diff options
| author | Tim Northover <tnorthover@apple.com> | 2016-08-23 18:20:09 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2016-08-23 18:20:09 +0000 |
| commit | 3c73e367c03dbf3e03911cffaaf465a0ce1688f6 (patch) | |
| tree | fc0b9a224d475252e2b12cefd6f6e10672be87a7 /llvm/lib/CodeGen | |
| parent | 6e3cda4dfc23cb17e83ff63242b4f0d931d1422b (diff) | |
| download | bcm5719-llvm-3c73e367c03dbf3e03911cffaaf465a0ce1688f6.tar.gz bcm5719-llvm-3c73e367c03dbf3e03911cffaaf465a0ce1688f6.zip | |
GlobalISel: legalize 1-bit load/store and mark 8/16 bit variants legal on AArch64.
llvm-svn: 279548
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp | 29 |
1 files changed, 24 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp b/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp index 9dc2bf8864e..7c3253dd36a 100644 --- a/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp @@ -105,6 +105,8 @@ MachineLegalizeHelper::narrowScalar(MachineInstr &MI, LLT NarrowTy) { MachineLegalizeHelper::LegalizeResult MachineLegalizeHelper::widenScalar(MachineInstr &MI, LLT WideTy) { unsigned WideSize = WideTy.getSizeInBits(); + MIRBuilder.setInstr(MI); + switch (MI.getOpcode()) { default: return UnableToLegalize; @@ -117,9 +119,6 @@ MachineLegalizeHelper::widenScalar(MachineInstr &MI, LLT WideTy) { // Perform operation at larger width (any extension is fine here, high bits // don't affect the result) and then truncate the result back to the // original type. - - MIRBuilder.setInstr(MI); - unsigned Src1Ext = MRI.createGenericVirtualRegister(WideSize); unsigned Src2Ext = MRI.createGenericVirtualRegister(WideSize); MIRBuilder.buildAnyExtend(WideTy, Src1Ext, MI.getOperand(1).getReg()); @@ -133,8 +132,29 @@ MachineLegalizeHelper::widenScalar(MachineInstr &MI, LLT WideTy) { MI.eraseFromParent(); return Legalized; } + case TargetOpcode::G_LOAD: { + assert(alignTo(MI.getType().getSizeInBits(), 8) == WideSize && + "illegal to increase number of bytes loaded"); + + unsigned DstExt = MRI.createGenericVirtualRegister(WideSize); + MIRBuilder.buildLoad(WideTy, MI.getType(1), DstExt, + MI.getOperand(1).getReg(), **MI.memoperands_begin()); + MIRBuilder.buildTrunc(MI.getType(), MI.getOperand(0).getReg(), DstExt); + MI.eraseFromParent(); + return Legalized; + } + case TargetOpcode::G_STORE: { + assert(alignTo(MI.getType().getSizeInBits(), 8) == WideSize && + "illegal to increase number of bytes modified by a store"); + + unsigned SrcExt = MRI.createGenericVirtualRegister(WideSize); + MIRBuilder.buildAnyExtend(WideTy, SrcExt, MI.getOperand(0).getReg()); + MIRBuilder.buildStore(WideTy, MI.getType(1), SrcExt, + MI.getOperand(1).getReg(), **MI.memoperands_begin()); + MI.eraseFromParent(); + return Legalized; + } case TargetOpcode::G_CONSTANT: { - MIRBuilder.setInstr(MI); unsigned DstExt = MRI.createGenericVirtualRegister(WideSize); MIRBuilder.buildConstant(WideTy, DstExt, MI.getOperand(1).getImm()); MIRBuilder.buildTrunc(MI.getType(), MI.getOperand(0).getReg(), DstExt); @@ -142,7 +162,6 @@ MachineLegalizeHelper::widenScalar(MachineInstr &MI, LLT WideTy) { return Legalized; } case TargetOpcode::G_FCONSTANT: { - MIRBuilder.setInstr(MI); unsigned DstExt = MRI.createGenericVirtualRegister(WideSize); MIRBuilder.buildFConstant(WideTy, DstExt, *MI.getOperand(1).getFPImm()); MIRBuilder.buildFPTrunc(MI.getType(), MI.getOperand(0).getReg(), DstExt); |

