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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2018-08-15 17:04:58 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2018-08-15 17:04:58 +0000
commit3b097b4d3e8cdefdc581d215110a4b5fb4279e1f (patch)
tree4cbf23305b839fa738b30a9a954d611605a538b3 /llvm/lib/CodeGen
parent712d42f53d1325340d9f8cdfd4f5f964b1431f96 (diff)
downloadbcm5719-llvm-3b097b4d3e8cdefdc581d215110a4b5fb4279e1f.tar.gz
bcm5719-llvm-3b097b4d3e8cdefdc581d215110a4b5fb4279e1f.zip
[RegisterCoalescer] Ensure that both registers have subranges if one does
llvm-svn: 339792
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/RegisterCoalescer.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index c6ac86f59de..e33429bfca7 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -876,10 +876,13 @@ bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
// Extend BValNo by merging in IntA live segments of AValNo. Val# definition
// is updated.
BumpPtrAllocator &Allocator = LIS->getVNInfoAllocator();
- if (IntB.hasSubRanges()) {
+ if (IntA.hasSubRanges() || IntB.hasSubRanges()) {
if (!IntA.hasSubRanges()) {
LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntA.reg);
IntA.createSubRangeFrom(Allocator, Mask, IntA);
+ } else if (!IntB.hasSubRanges()) {
+ LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntB.reg);
+ IntB.createSubRangeFrom(Allocator, Mask, IntB);
}
SlotIndex AIdx = CopyIdx.getRegSlot(true);
for (LiveInterval::SubRange &SA : IntA.subranges()) {
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