[GlobalISel] Allow MachineIRBuilder to build subregister copies.

This relaxes some asserts about sizes, and adds an optional subreg parameter
to buildCopy().

Also update AArch64 instruction selector to use this in places where we
previously used MachineInstrBuilder manually.

Differential Revision: https://reviews.llvm.org/D59434

llvm-svn: 356304

1 files changed, 5 insertions, 5 deletions

diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
index 81d26e6addb..6f95c03c899 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
@@ -242,8 +242,11 @@ MachineInstrBuilder MachineIRBuilder::buildBrIndirect(unsigned Tgt) {
 }
 
 MachineInstrBuilder MachineIRBuilder::buildCopy(const DstOp &Res,
-                                                const SrcOp &Op) {
-  return buildInstr(TargetOpcode::COPY, Res, Op);
+                                                const SrcOp &Op,
+                                                unsigned Subreg) {
+  auto Copy = buildInstr(TargetOpcode::COPY, Res, Op);
+  Copy->getOperand(1).setSubReg(Subreg);
+  return Copy;
 }
 
 MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res,
@@ -913,9 +916,6 @@ MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opc,
   case TargetOpcode::COPY:
     assert(DstOps.size() == 1 && "Invalid Dst");
     assert(SrcOps.size() == 1 && "Invalid Srcs");
-    assert(DstOps[0].getLLTTy(*getMRI()) == LLT() ||
-           SrcOps[0].getLLTTy(*getMRI()) == LLT() ||
-           DstOps[0].getLLTTy(*getMRI()) == SrcOps[0].getLLTTy(*getMRI()));
     break;
   case TargetOpcode::G_FCMP:
   case TargetOpcode::G_ICMP: {