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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-12 01:24:51 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-12 01:24:51 +0000 |
| commit | 35163e21dc60677bcd9fd2a76dca3c2cdf29a794 (patch) | |
| tree | 17f661d1e2539f29a48ea35eccd78ac0de1c2f15 /llvm/lib/CodeGen | |
| parent | 663b7f353e2585380706551aa1dbf63109707b91 (diff) | |
| download | bcm5719-llvm-35163e21dc60677bcd9fd2a76dca3c2cdf29a794.tar.gz bcm5719-llvm-35163e21dc60677bcd9fd2a76dca3c2cdf29a794.zip | |
Use an existing function.
llvm-svn: 141763
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index c6eeebe606e..c2a58c6357a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -2760,16 +2760,8 @@ getRegForInlineAsmConstraint(const std::string &Constraint, // If none of the value types for this register class are valid, we // can't use it. For example, 64-bit reg classes on 32-bit targets. - bool isLegal = false; - for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end(); - I != E; ++I) { - if (isTypeLegal(*I)) { - isLegal = true; - break; - } - } - - if (!isLegal) continue; + if (!isLegalRC(RC)) + continue; for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); I != E; ++I) { |
