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author | Chris Lattner <sabre@nondot.org> | 2010-04-04 18:58:53 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-04-04 18:58:53 +0000 |
commit | 2b40a207bc23568e396e32db02d465329e1659e5 (patch) | |
tree | 1a728ca2911edb7ed71d61336e0147499efde3cd /llvm/lib/CodeGen | |
parent | 7bde8c07a7db0a9442052d9ea626af2885c0142c (diff) | |
download | bcm5719-llvm-2b40a207bc23568e396e32db02d465329e1659e5.tar.gz bcm5719-llvm-2b40a207bc23568e396e32db02d465329e1659e5.zip |
more interface cleanup make some helpers static functions.
llvm-svn: 100343
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 51 |
1 files changed, 24 insertions, 27 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index eb937ec0cdd..62207f2fcd4 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -401,6 +401,28 @@ static void EmitComments(const MachineInstr &MI, raw_ostream &CommentOS) { } } +/// EmitImplicitDef - This method emits the specified machine instruction +/// that is an implicit def. +static void EmitImplicitDef(const MachineInstr *MI, AsmPrinter &AP) { + unsigned RegNo = MI->getOperand(0).getReg(); + AP.OutStreamer.AddComment(Twine("implicit-def: ") + + AP.TM.getRegisterInfo()->getName(RegNo)); + AP.OutStreamer.AddBlankLine(); +} + +static void EmitKill(const MachineInstr *MI, AsmPrinter &AP) { + std::string Str = "kill:"; + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + const MachineOperand &Op = MI->getOperand(i); + assert(Op.isReg() && "KILL instruction must have only register operands"); + Str += ' '; + Str += AP.TM.getRegisterInfo()->getName(Op.getReg()); + Str += (Op.isDef() ? "<def>" : "<kill>"); + } + AP.OutStreamer.AddComment(Str); + AP.OutStreamer.AddBlankLine(); +} + /// EmitFunctionBody - This method emits the body and trailer for a @@ -442,10 +464,10 @@ void AsmPrinter::EmitFunctionBody() { EmitInlineAsm(II); break; case TargetOpcode::IMPLICIT_DEF: - EmitImplicitDef(II); + if (isVerbose()) EmitImplicitDef(II, *this); break; case TargetOpcode::KILL: - EmitKill(II); + if (isVerbose()) EmitKill(II, *this); break; default: EmitInstruction(II); @@ -1324,31 +1346,6 @@ void AsmPrinter::printOffset(int64_t Offset, raw_ostream &OS) const { } -/// EmitImplicitDef - This method emits the specified machine instruction -/// that is an implicit def. -void AsmPrinter::EmitImplicitDef(const MachineInstr *MI) const { - if (!isVerbose()) return; - unsigned RegNo = MI->getOperand(0).getReg(); - OutStreamer.AddComment(Twine("implicit-def: ") + - TM.getRegisterInfo()->getName(RegNo)); - OutStreamer.AddBlankLine(); -} - -void AsmPrinter::EmitKill(const MachineInstr *MI) const { - if (!isVerbose()) return; - - std::string Str = "kill:"; - for (unsigned n = 0, e = MI->getNumOperands(); n != e; ++n) { - const MachineOperand &Op = MI->getOperand(n); - assert(Op.isReg() && "KILL instruction must have only register operands"); - Str += ' '; - Str += TM.getRegisterInfo()->getName(Op.getReg()); - Str += (Op.isDef() ? "<def>" : "<kill>"); - } - OutStreamer.AddComment(Str); - OutStreamer.AddBlankLine(); -} - MCSymbol *AsmPrinter::GetBlockAddressSymbol(const BlockAddress *BA) const { return MMI->getAddrLabelSymbol(BA->getBasicBlock()); } |