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| author | Matthias Braun <matze@braunis.de> | 2017-01-21 02:21:04 +0000 |
|---|---|---|
| committer | Matthias Braun <matze@braunis.de> | 2017-01-21 02:21:04 +0000 |
| commit | 28eae8f4e0fa4f5b7329a1255c2cf61b88901f33 (patch) | |
| tree | b0dd42016c313dc7546ee3cbaa90dc1bafc88753 /llvm/lib/CodeGen | |
| parent | dd511b48404484cc7a546b0cbeb34dec778a7a23 (diff) | |
| download | bcm5719-llvm-28eae8f4e0fa4f5b7329a1255c2cf61b88901f33.tar.gz bcm5719-llvm-28eae8f4e0fa4f5b7329a1255c2cf61b88901f33.zip | |
LiveRegUnits: Add accumulateBackward() function
Re-Commit r292543 with a fix for the situation when the chain end is
MBB.end().
This function can be used to accumulate the set of all read and modified
register in a sequence of instructions.
Use this code in AArch64A57FPLoadBalancing::scavengeRegister() to prove
the concept.
- The AArch64A57LoadBalancing code is using a backwards analysis now
which is irrespective of kill flags. This is the main motivation for
this change.
Differential Revision: http://reviews.llvm.org/D22082
llvm-svn: 292705
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/LiveRegUnits.cpp | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/LiveRegUnits.cpp b/llvm/lib/CodeGen/LiveRegUnits.cpp index 14da799a63f..0a10b4e6265 100644 --- a/llvm/lib/CodeGen/LiveRegUnits.cpp +++ b/llvm/lib/CodeGen/LiveRegUnits.cpp @@ -26,6 +26,15 @@ void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) { } } +void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) { + for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) { + for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) { + if (MachineOperand::clobbersPhysReg(RegMask, *RootReg)) + Units.set(U); + } + } +} + void LiveRegUnits::stepBackward(const MachineInstr &MI) { // Remove defined registers and regmask kills from the set. for (ConstMIBundleOperands O(MI); O.isValid(); ++O) { @@ -51,6 +60,21 @@ void LiveRegUnits::stepBackward(const MachineInstr &MI) { } } +void LiveRegUnits::accumulateBackward(const MachineInstr &MI) { + // Add defs, uses and regmask clobbers to the set. + for (ConstMIBundleOperands O(MI); O.isValid(); ++O) { + if (O->isReg()) { + unsigned Reg = O->getReg(); + if (!TargetRegisterInfo::isPhysicalRegister(Reg)) + continue; + if (!O->isDef() && !O->readsReg()) + continue; + addReg(Reg); + } else if (O->isRegMask()) + addRegsInMask(O->getRegMask()); + } +} + /// Add live-in registers of basic block \p MBB to \p LiveUnits. static void addLiveIns(LiveRegUnits &LiveUnits, const MachineBasicBlock &MBB) { for (const auto &LI : MBB.liveins()) |

