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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-10-28 20:06:37 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-10-28 20:06:37 +0000 |
| commit | 2717175c99caab6313feb81e71b1f5e9928f92fe (patch) | |
| tree | 1628c0ed39601e788f159a8b8756be6040bfaf56 /llvm/lib/CodeGen | |
| parent | 931bc548e6b6f643370a32306d9d897d19884c37 (diff) | |
| download | bcm5719-llvm-2717175c99caab6313feb81e71b1f5e9928f92fe.tar.gz bcm5719-llvm-2717175c99caab6313feb81e71b1f5e9928f92fe.zip | |
Handle non-~0 lane masks on live-in registers in LivePhysRegs
When LivePhysRegs adds live-in registers, it recognizes ~0 as a special
lane mask indicating the entire register. If the lane mask is not ~0,
it will only add the subregisters that overlap the specified lane mask.
The problem is that if a live-in register does not have subregisters,
and the lane mask is not ~0, it will not be added to the live set.
(The given lane mask may simply be the lane mask of its register class.)
If a register does not have subregisters, add it to the live set if
the lane mask is non-zero.
Differential Revision: https://reviews.llvm.org/D26094
llvm-svn: 285440
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/LivePhysRegs.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp index 7d0bf743f31..9b5d7843463 100644 --- a/llvm/lib/CodeGen/LivePhysRegs.cpp +++ b/llvm/lib/CodeGen/LivePhysRegs.cpp @@ -143,11 +143,12 @@ bool LivePhysRegs::available(const MachineRegisterInfo &MRI, /// Add live-in registers of basic block \p MBB to \p LiveRegs. void LivePhysRegs::addBlockLiveIns(const MachineBasicBlock &MBB) { for (const auto &LI : MBB.liveins()) { - if (LI.LaneMask == ~0u) { + MCSubRegIndexIterator S(LI.PhysReg, TRI); + if (LI.LaneMask == ~0u || (LI.LaneMask != 0 && !S.isValid())) { addReg(LI.PhysReg); continue; } - for (MCSubRegIndexIterator S(LI.PhysReg, TRI); S.isValid(); ++S) + for (; S.isValid(); ++S) if (LI.LaneMask & TRI->getSubRegIndexLaneMask(S.getSubRegIndex())) addReg(S.getSubReg()); } |

