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authorDan Gohman <gohman@apple.com>2008-08-20 18:09:38 +0000
committerDan Gohman <gohman@apple.com>2008-08-20 18:09:38 +0000
commit2471f6ce0f74244ce5307428be0f9e9b5fede912 (patch)
tree68e4e4d184eb780eec291296a27fed46af710b23 /llvm/lib/CodeGen
parent39a5ffb03fba475072cebba784d29deb81f4e594 (diff)
downloadbcm5719-llvm-2471f6ce0f74244ce5307428be0f9e9b5fede912.tar.gz
bcm5719-llvm-2471f6ce0f74244ce5307428be0f9e9b5fede912.zip
Minor whitespace cleanup.
llvm-svn: 55070
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/FastISel.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
index 9ccfe0f7b01..7cb888ccb98 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -144,7 +144,7 @@ unsigned FastISel::FastEmit_rr(MVT::SimpleValueType, ISD::NodeType,
}
unsigned FastISel::FastEmitInst_(unsigned MachineInstOpcode,
- const TargetRegisterClass* RC) {
+ const TargetRegisterClass* RC) {
MachineRegisterInfo &MRI = MF->getRegInfo();
const TargetInstrDesc &II = TII->get(MachineInstOpcode);
unsigned ResultReg = MRI.createVirtualRegister(RC);
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