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authorSimon Pilgrim <llvm-dev@redking.me.uk>2019-08-01 17:46:44 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2019-08-01 17:46:44 +0000
commit1d183b407a392609d0769598e5b8d6fb8a37d3f9 (patch)
tree5e230c2f56f953b7ec7213df1612dda3e0a59902 /llvm/lib/CodeGen
parent4ef767dfe936c6c32ec37694095c22dac8db5d91 (diff)
downloadbcm5719-llvm-1d183b407a392609d0769598e5b8d6fb8a37d3f9.tar.gz
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[TargetLowering] SimplifyMultipleUseDemandedBits - Add ISD::INSERT_VECTOR_ELT handling
Allow us to peek through vector insertions to avoid dependencies on entire insertion chains. llvm-svn: 367588
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp10
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 9633a8c873a..89181fee257 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -676,6 +676,16 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
return Op.getOperand(0);
break;
}
+ case ISD::INSERT_VECTOR_ELT: {
+ // If we don't demand the inserted element, return the base vector.
+ SDValue Vec = Op.getOperand(0);
+ auto *CIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
+ MVT VecVT = Vec.getSimpleValueType();
+ if (CIdx && CIdx->getAPIntValue().ult(VecVT.getVectorNumElements()) &&
+ !DemandedElts[CIdx->getZExtValue()])
+ return Vec;
+ break;
+ }
case ISD::VECTOR_SHUFFLE: {
ArrayRef<int> ShuffleMask = cast<ShuffleVectorSDNode>(Op)->getMask();
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