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| author | Dan Gohman <gohman@apple.com> | 2009-04-20 22:54:34 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-04-20 22:54:34 +0000 |
| commit | 1addf64735448ab3d7b070b0d172ac53376517a7 (patch) | |
| tree | 938ffbd01cbfa9bed5a7edf7b476d1f640448acc /llvm/lib/CodeGen | |
| parent | e014b69919a5e65374e48158c4df168de82dfe96 (diff) | |
| download | bcm5719-llvm-1addf64735448ab3d7b070b0d172ac53376517a7.tar.gz bcm5719-llvm-1addf64735448ab3d7b070b0d172ac53376517a7.zip | |
Make X86's copyRegToReg able to handle copies to and from subclasses.
This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp
unnecessary. Derived from a patch by Jakob Stoklund Olesen.
llvm-svn: 69635
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp index 42fe1f5fbf4..eddf44f1fb2 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp @@ -131,12 +131,6 @@ void ScheduleDAGSDNodes::EmitCopyFromReg(SDNode *Node, unsigned ResNo, VRBase = MRI.createVirtualRegister(DstRC); bool Emitted = TII->copyRegToReg(*BB, InsertPos, VRBase, SrcReg, DstRC, SrcRC); - // If the target didn't handle the copy with different register - // classes and the destination is a subset of the source, - // try a normal same-RC copy. - if (!Emitted && DstRC->hasSuperClass(SrcRC)) - Emitted = TII->copyRegToReg(*BB, InsertPos, VRBase, SrcReg, - SrcRC, SrcRC); assert(Emitted && "Unable to issue a copy instruction!\n"); } @@ -273,12 +267,6 @@ ScheduleDAGSDNodes::AddRegisterOperand(MachineInstr *MI, SDValue Op, unsigned NewVReg = MRI.createVirtualRegister(DstRC); bool Emitted = TII->copyRegToReg(*BB, InsertPos, NewVReg, VReg, DstRC, SrcRC); - // If the target didn't handle the copy with different register - // classes and the destination is a subset of the source, - // try a normal same-RC copy. - if (!Emitted && DstRC->hasSuperClass(SrcRC)) - Emitted = TII->copyRegToReg(*BB, InsertPos, NewVReg, VReg, - SrcRC, SrcRC); assert(Emitted && "Unable to issue a copy instruction!\n"); VReg = NewVReg; } @@ -480,12 +468,6 @@ ScheduleDAGSDNodes::EmitCopyToRegClassNode(SDNode *Node, unsigned NewVReg = MRI.createVirtualRegister(DstRC); bool Emitted = TII->copyRegToReg(*BB, InsertPos, NewVReg, VReg, DstRC, SrcRC); - // If the target didn't handle the copy with different register - // classes and the destination is a subset of the source, - // try a normal same-RC copy. - if (!Emitted && SrcRC->hasSubClass(DstRC)) - Emitted = TII->copyRegToReg(*BB, InsertPos, NewVReg, VReg, - SrcRC, SrcRC); assert(Emitted && "Unable to issue a copy instruction for a COPY_TO_REGCLASS node!\n"); @@ -610,13 +592,6 @@ void ScheduleDAGSDNodes::EmitNode(SDNode *Node, bool IsClone, bool IsCloned, bool Emitted = TII->copyRegToReg(*BB, InsertPos, DestReg, SrcReg, DstTRC, SrcTRC); - // If the target didn't handle the copy with different register - // classes and the destination is a subset of the source, - // try a normal same-RC copy. - if (!Emitted && DstTRC->hasSubClass(SrcTRC)) - Emitted = TII->copyRegToReg(*BB, InsertPos, DestReg, SrcReg, - DstTRC, DstTRC); - assert(Emitted && "Unable to issue a copy instruction!\n"); break; } |

