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authorAdrian Prantl <aprantl@apple.com>2015-03-04 17:39:33 +0000
committerAdrian Prantl <aprantl@apple.com>2015-03-04 17:39:33 +0000
commit0f61579602d6b923cb44b432f29e6d83b04b0945 (patch)
treee8a23701c5911a0ee62f53e0ef7afaa4dd6f7457 /llvm/lib/CodeGen
parentd2af89df107a1e949b388c3431b4c79a6ed2290b (diff)
downloadbcm5719-llvm-0f61579602d6b923cb44b432f29e6d83b04b0945.tar.gz
bcm5719-llvm-0f61579602d6b923cb44b432f29e6d83b04b0945.zip
Fix DwarfExpression::AddMachineRegExpression so it doesn't read past the
end of an expression that ends with DW_OP_plus. Caught by the ASAN build bots. llvm-svn: 231260
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp26
1 files changed, 15 insertions, 11 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
index 86954e90b68..489e455c122 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
@@ -196,11 +196,12 @@ bool DwarfExpression::AddMachineRegExpression(DIExpression Expr,
unsigned MachineReg,
unsigned PieceOffsetInBits) {
auto I = Expr.begin();
- // Pattern-match combinations for which more efficient representations exist
- // first.
- if (I == Expr.end())
+ auto E = Expr.end();
+ if (I == E)
return AddMachineRegPiece(MachineReg);
+ // Pattern-match combinations for which more efficient representations exist
+ // first.
bool ValidReg = false;
switch (*I) {
case dwarf::DW_OP_bit_piece: {
@@ -210,20 +211,23 @@ bool DwarfExpression::AddMachineRegExpression(DIExpression Expr,
return AddMachineRegPiece(MachineReg, SizeInBits,
getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
}
- case dwarf::DW_OP_plus:
+ case dwarf::DW_OP_plus: {
// [DW_OP_reg,Offset,DW_OP_plus,DW_OP_deref] --> [DW_OP_breg,Offset].
- if (I->getNext() == dwarf::DW_OP_deref) {
+ auto N = I->getNext();
+ if ((N != E) && (*N == dwarf::DW_OP_deref)) {
unsigned Offset = I->getArg(1);
ValidReg = AddMachineRegIndirect(MachineReg, Offset);
std::advance(I, 2);
break;
} else
ValidReg = AddMachineRegPiece(MachineReg);
- case dwarf::DW_OP_deref:
- // [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
- ValidReg = AddMachineRegIndirect(MachineReg);
- ++I;
- break;
+ }
+ case dwarf::DW_OP_deref: {
+ // [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
+ ValidReg = AddMachineRegIndirect(MachineReg);
+ ++I;
+ break;
+ }
default:
llvm_unreachable("unsupported operand");
}
@@ -232,7 +236,7 @@ bool DwarfExpression::AddMachineRegExpression(DIExpression Expr,
return false;
// Emit remaining elements of the expression.
- AddExpression(I, Expr.end(), PieceOffsetInBits);
+ AddExpression(I, E, PieceOffsetInBits);
return true;
}
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