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author | Puyan Lotfi <puyan@puyan.org> | 2019-05-30 18:06:28 +0000 |
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committer | Puyan Lotfi <puyan@puyan.org> | 2019-05-30 18:06:28 +0000 |
commit | 0f4446b2700a02612297bdb73a75a784a46d31bf (patch) | |
tree | 9ab4069b8d96e8e34a1026c7f12213b809b1b738 /llvm/lib/CodeGen | |
parent | 50daaa5f6b2636578ac70ed08e0db246be3b95b8 (diff) | |
download | bcm5719-llvm-0f4446b2700a02612297bdb73a75a784a46d31bf.tar.gz bcm5719-llvm-0f4446b2700a02612297bdb73a75a784a46d31bf.zip |
[MIR-Canon] Add support for rewriting VRegs that are typed but don't have an RC.
There were crashes (addrspace-memoperands.mir was only one of them) in MIR that
had operands that came from before register classes were set. With these
operands, creating a replacement vreg (for MIR-Canon's renaming) needs to use
the vreg type rather than the RegisterClass which is not present.
Differential Revision: https://reviews.llvm.org/D62543
llvm-svn: 362122
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/MIRCanonicalizerPass.cpp | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp b/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp index e7db863e1f9..e8a6e409fb5 100644 --- a/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp +++ b/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp @@ -500,14 +500,15 @@ public: return virtualVRegNumber; } - unsigned createVirtualRegister(const TargetRegisterClass *RC) { + unsigned createVirtualRegister(unsigned VReg) { std::string S; raw_string_ostream OS(S); OS << "namedVReg" << (virtualVRegNumber & ~0x80000000); OS.flush(); virtualVRegNumber++; - - return MRI.createVirtualRegister(RC, OS.str()); + if (auto RC = MRI.getRegClassOrNull(VReg)) + return MRI.createVirtualRegister(RC, OS.str()); + return MRI.createGenericVirtualRegister(MRI.getType(VReg), OS.str()); } }; } // namespace @@ -557,7 +558,7 @@ GetVRegRenameMap(const std::vector<TypedVReg> &VRegs, continue; } - auto Rename = NVC.createVirtualRegister(MRI.getRegClass(Reg)); + auto Rename = NVC.createVirtualRegister(Reg); if (VRegRenameMap.find(Reg) == VRegRenameMap.end()) { LLVM_DEBUG(dbgs() << "Mapping vreg ";); @@ -741,7 +742,7 @@ static bool runOnBasicBlock(MachineBasicBlock *MBB, MachineInstr &MI = *MII++; Changed = true; unsigned vRegToRename = MI.getOperand(0).getReg(); - auto Rename = NVC.createVirtualRegister(MRI.getRegClass(vRegToRename)); + auto Rename = NVC.createVirtualRegister(vRegToRename); std::vector<MachineOperand *> RenameMOs; for (auto &MO : MRI.reg_operands(vRegToRename)) { |