summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2008-06-30 22:10:09 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-06-30 22:10:09 +0000
commit0d3628946f756d6159daaf7b22e3336c30857817 (patch)
tree3a568874d3c451162b9cbb327bd9b5371b485a3b /llvm/lib/CodeGen
parent6896901e2cbb4b0941a7010af89f7b6fd2df3550 (diff)
downloadbcm5719-llvm-0d3628946f756d6159daaf7b22e3336c30857817.tar.gz
bcm5719-llvm-0d3628946f756d6159daaf7b22e3336c30857817.zip
Add timing report for various sub-passes under SelectionDAGISel.
llvm-svn: 52930
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp26
1 files changed, 26 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 273f046bf7c..c0b0e0356f3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -5314,11 +5314,17 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo(SelectionDAG &DAG) {
}
void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
+ NamedRegionTimer *RegionTimer = 0;
+
DOUT << "Lowered selection DAG:\n";
DEBUG(DAG.dump());
// Run the DAG combiner in pre-legalize mode.
+ if (TimePassesIsEnabled)
+ RegionTimer = new NamedRegionTimer("DAG Combining 1");
DAG.Combine(false, *AA);
+ if (TimePassesIsEnabled)
+ delete RegionTimer;
DOUT << "Optimized lowered selection DAG:\n";
DEBUG(DAG.dump());
@@ -5329,13 +5335,21 @@ void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
DAG.LegalizeTypes();
// Someday even later, enable a dag combine pass here.
#endif
+ if (TimePassesIsEnabled)
+ RegionTimer = new NamedRegionTimer("DAG Legalization");
DAG.Legalize();
+ if (TimePassesIsEnabled)
+ delete RegionTimer;
DOUT << "Legalized selection DAG:\n";
DEBUG(DAG.dump());
// Run the DAG combiner in post-legalize mode.
+ if (TimePassesIsEnabled)
+ RegionTimer = new NamedRegionTimer("DAG Combining 2");
DAG.Combine(true, *AA);
+ if (TimePassesIsEnabled)
+ delete RegionTimer;
DOUT << "Optimized legalized selection DAG:\n";
DEBUG(DAG.dump());
@@ -5347,14 +5361,26 @@ void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
// Third, instruction select all of the operations to machine code, adding the
// code to the MachineBasicBlock.
+ if (TimePassesIsEnabled)
+ RegionTimer = new NamedRegionTimer("Instruction Selection");
InstructionSelect(DAG);
+ if (TimePassesIsEnabled)
+ delete RegionTimer;
// Emit machine code to BB. This can change 'BB' to the last block being
// inserted into.
+ if (TimePassesIsEnabled)
+ RegionTimer = new NamedRegionTimer("Instruction Scheduling");
ScheduleAndEmitDAG(DAG);
+ if (TimePassesIsEnabled)
+ delete RegionTimer;
// Perform target specific isel post processing.
+ if (TimePassesIsEnabled)
+ RegionTimer = new NamedRegionTimer("Instruction Selection Post Processing");
InstructionSelectPostProcessing(DAG);
+ if (TimePassesIsEnabled)
+ delete RegionTimer;
DOUT << "Selected machine code:\n";
DEBUG(BB->dump());
OpenPOWER on IntegriCloud