diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-12 23:37:40 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-12 23:37:40 +0000 |
| commit | 068dc91de909af2c3901af48c682898e121c95fc (patch) | |
| tree | bbdc9e6c20931885e5c90ec5760e4a36a5b718ac /llvm/lib/CodeGen | |
| parent | 35b362fab2888deb27a33d19bb1bcbcb5d9a8aff (diff) | |
| download | bcm5719-llvm-068dc91de909af2c3901af48c682898e121c95fc.tar.gz bcm5719-llvm-068dc91de909af2c3901af48c682898e121c95fc.zip | |
Also inflate register classes around inline asm.
Now that MI->getRegClassConstraint() can also handle inline assembly,
don't bail when recomputing the register class of a virtual register
used by inline asm.
This fixes PR11078.
llvm-svn: 141836
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/MachineRegisterInfo.cpp | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp index 97d9d0f922c..266ebf64a3f 100644 --- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp +++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp @@ -79,11 +79,8 @@ MachineRegisterInfo::recomputeRegClass(unsigned Reg, const TargetMachine &TM) { // TRI doesn't have accurate enough information to model this yet. if (I.getOperand().getSubReg()) return false; - // Inline asm instuctions don't remember their constraints. - if (I->isInlineAsm()) - return false; const TargetRegisterClass *OpRC = - TII->getRegClass(I->getDesc(), I.getOperandNo(), TRI); + I->getRegClassConstraint(I.getOperandNo(), TII, TRI); if (OpRC) NewRC = TRI->getCommonSubClass(NewRC, OpRC); if (!NewRC || NewRC == OldRC) |
