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authorRuchira Sasanka <sasanka@students.uiuc.edu>2001-10-19 21:39:31 +0000
committerRuchira Sasanka <sasanka@students.uiuc.edu>2001-10-19 21:39:31 +0000
commit01c55ba00c3c5b81404a18c315b0f1bf467529ce (patch)
treeaeee01b6d4b4e52209eaaf39b1175b5878e0de87 /llvm/lib/CodeGen
parent1437395c9f44e51940b447da88abb0b4f4baa8e9 (diff)
downloadbcm5719-llvm-01c55ba00c3c5b81404a18c315b0f1bf467529ce.tar.gz
bcm5719-llvm-01c55ba00c3c5b81404a18c315b0f1bf467529ce.zip
Added code to PhyRegAlloc to mark unusable suggested regs
Added initialization to AdjList to IGNode constructor - major bug fix llvm-svn: 920
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/RegAlloc/IGNode.cpp1
-rw-r--r--llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp62
2 files changed, 57 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/RegAlloc/IGNode.cpp b/llvm/lib/CodeGen/RegAlloc/IGNode.cpp
index 0e8a124cd3d..75007a0898b 100644
--- a/llvm/lib/CodeGen/RegAlloc/IGNode.cpp
+++ b/llvm/lib/CodeGen/RegAlloc/IGNode.cpp
@@ -2,6 +2,7 @@
IGNode::IGNode(LiveRange *const PLR, unsigned int Ind): Index(Ind),
+ AdjList(),
ParentLR(PLR)
{
OnStack = false;
diff --git a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index 98300499b15..b36e8e44437 100644
--- a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -665,11 +665,7 @@ void PhyRegAlloc::printMachineCode()
// else it must be a register value
const int RegNum = Op.getAllocatedRegNum();
- //if( RegNum != 1000)
-
- cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
- // else cout << "\t<*NoReg*>";
-
+ cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
}
}
@@ -740,6 +736,8 @@ void PhyRegAlloc::colorCallRetArgs()
}
+
+
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
@@ -772,6 +770,52 @@ void PhyRegAlloc::printLabel(const Value *const Val)
//----------------------------------------------------------------------------
+// This method calls setSugColorUsable method of each live range. This
+// will determine whether the suggested color of LR is really usable.
+// A suggested color is not usable when the suggested color is volatile
+// AND when there are call interferences
+//----------------------------------------------------------------------------
+
+void PhyRegAlloc::markUnusableSugColors()
+{
+ if(DEBUG_RA ) cout << "Creating LR lists ..." << endl;
+
+ // hash map iterator
+ LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin();
+ LiveRangeMapType::const_iterator HMIEnd = (LRI.getLiveRangeMap())->end();
+
+ for( ; HMI != HMIEnd ; ++HMI ) {
+
+ if( (*HMI).first ) {
+
+ LiveRange *L = (*HMI).second; // get the LiveRange
+
+ if(L) {
+ if( L->hasSuggestedColor() ) {
+
+ int RCID = (L->getRegClass())->getID();
+ if( MRI.isRegVolatile( RCID, L->getSuggestedColor()) &&
+ L->isCallInterference() )
+ L->setSuggestedColorUsable( false );
+ else
+ L->setSuggestedColorUsable( true );
+ }
+ } // if L->hasSuggestedColor()
+ }
+ } // for all LR's in hash map
+}
+
+
+
+
+
+
+
+
+
+
+
+//----------------------------------------------------------------------------
// The entry pont to Register Allocation
//----------------------------------------------------------------------------
@@ -814,7 +858,13 @@ void PhyRegAlloc::allocateRegisters()
RegClassList[ rc ]->printIG();
}
- // color all register classes
+
+ // mark un-usable suggested color before graph coloring algorithm.
+ // When this is done, the graph coloring algo will not reserve
+ // suggested color unnecessarily - they can be used by another LR
+ markUnusableSugColors();
+
+ // color all register classes using the graph coloring algo
for( unsigned int rc=0; rc < NumOfRegClasses ; rc++)
RegClassList[ rc ]->colorAllRegs();
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