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| author | Bill Wendling <isanbard@gmail.com> | 2011-10-12 23:03:40 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2011-10-12 23:03:40 +0000 |
| commit | 3e5409df7744ba258f3492fc070a0bd838abd50a (patch) | |
| tree | a6e787b59b2afb7451d361d999b88278c67226f3 /llvm/lib/CodeGen/VirtRegRewriter.cpp | |
| parent | 979009ea616dd723b8c695ce85e735b8e1e6c66b (diff) | |
| download | bcm5719-llvm-3e5409df7744ba258f3492fc070a0bd838abd50a.tar.gz bcm5719-llvm-3e5409df7744ba258f3492fc070a0bd838abd50a.zip | |
We need to verify that the machine instruction we're using as a replacement for
our current machine instruction defines a register with the same register class
as what's being replaced. This showed up in the SPEC 403.gcc benchmark, where it
would ICE because a tail call was expecting one register class but was given
another. (The machine instruction verifier catches this situation.)
<rdar://problem/10270968>
llvm-svn: 141830
Diffstat (limited to 'llvm/lib/CodeGen/VirtRegRewriter.cpp')
0 files changed, 0 insertions, 0 deletions
