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| author | Petar Avramovic <Petar.Avramovic@rt-rk.com> | 2019-10-22 13:51:57 +0000 |
|---|---|---|
| committer | Petar Avramovic <Petar.Avramovic@rt-rk.com> | 2019-10-22 13:51:57 +0000 |
| commit | e4af9de36ca60483040af381edd10e716e7b077d (patch) | |
| tree | d3c47728f7423caaa58dca91f87789eff8f58744 /llvm/lib/CodeGen/VirtRegMap.cpp | |
| parent | e5dd30f77e10b3fa3395312045c06e5e15f9620e (diff) | |
| download | bcm5719-llvm-e4af9de36ca60483040af381edd10e716e7b077d.tar.gz bcm5719-llvm-e4af9de36ca60483040af381edd10e716e7b077d.zip | |
[MIPS GlobalISel] Select MSA vector generic and builtin add
Select vector G_ADD for MIPS32 with MSA. We have to set bank
for vector operands to fprb and selectImpl will do the rest.
__builtin_msa_addv_<format> will be transformed into G_ADD
in legalizeIntrinsic and selected in the same way.
__builtin_msa_addvi_<format> will be directly selected into
ADDVI_<format> in legalizeIntrinsic. MIR tests for it have
unnecessary additional copies. Capture current state of tests
with run-pass=legalizer with a test in test/CodeGen/MIR/Mips.
Differential Revision: https://reviews.llvm.org/D68984
llvm-svn: 375501
Diffstat (limited to 'llvm/lib/CodeGen/VirtRegMap.cpp')
0 files changed, 0 insertions, 0 deletions

